The ISLA112P50 is a low-power, high-performance, 500MSPS analog-to-digital converter designed with Intersil's proprietary FemtoCharge™ technology on a standard CMOS process. The ISLA112P50 is part of a pin-compatible portfolio of 8, 10 and 12-bit A/Ds. This device an upgrade of the KAD551XP-50 product family and is pin similar. The device utilizes two time-interleaved 250MSPS unit A/Ds to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. The proprietary Intersil Interleave Engine (I2E) performs automatic fine correction of offset, gain, and sample time skew mismatches between the unit A/Ds to optimize performance. No external interleaving algorithm is required. A serial peripheral interface (SPI) port allows for extensive configurability of the A/D. The SPI also controls the interleave correction circuitry, allowing the system to issue continuous calibration commands as well as configure many dynamic parameters. Digital output data is presented in selectable LVDS or CMOS formats. The ISLA112P50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).
|Document title||Document type
|PDF 1.65 MB||Datasheet|
|PDF 342 KB||Application Note|
|PDF 296 KB||Application Note|
|PDF 503 KB||Application Note|
|PDF 1.08 MB||Application Note|
|PDF 287 KB||Application Note|
|PDF 1.02 MB||Guide|
|PDF 509 KB||Manual - Development Tools|
|PDF 363 KB||Product Advisory|
|PDF 34 KB||Product Advisory|
|PDF 197 KB||Product Change Notice|
|Software title||Software type
|EXE 162.95 MB||Library|
|EXE 1.00 MB||Library|
|PDF 56 KB||PCB Design Files|
|PDF 483 KB||PCB Design Files|
|PDF 959 KB||PCB Design Files|
|ZIP 246 KB||PCB Design Files|
|ZIP 4.49 MB||PCB Design Files|
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