特長
- Functionally compatible with 720x family
- Low-power consumption
- 15 ns access time
- Asynchronous and simultaneous read and write
- Fully expandable by both word depth and/or bit width
- Status Flags: Empty, Half-Full, Full
- Auto-retransmit capability
- Available in 32-pin PLCC
- Industrial temperature range (–40C to +85C) is available
説明
The 72V01 is a 512 x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
パラメータ
| 属性 | 値 |
|---|---|
| Core Voltage (V) | 3.3 |
| Bus Width (bits) | 9 |
| Density (Kb) | 4 |
| Pkg. Code | PLG32 |
| Interface | Asynchronous |
| I/O Type | 3.3 V LVTTL |
| Organization | 512 x 9 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Uni-directional |
| Access Time (ns) | 15, 25 |
パッケージオプション
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| PLCC | 13.97 x 11.43 x 2.79 | 32 | 1.27 |