概要
説明
The 7206 is a 16K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
特長
- Pin and functionally compatible with 720X family
- Low power consumption
- Ultra high speed—12ns access time
- Asynchronous and simultaneous read and write
- Fully expandable by both word depth and/or bit width
- Status Flags: Empty, Half-Full, Full
- Auto-retransmit capability
- MIL-STD-883, Class B available in 28 pin (600 mil) Cerdip and 32 pin LCC packages
- Industrial temperature range (–40C to +85C) is available
- Available in 28 pin PDIP (300 & 600 mil), and 32 pin PLCC packages
ドキュメント
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日付 | |
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| PDF 168 KB | データシート | |
| PDF 1.29 MB | EOL通知 | |
| PDF 1.22 MB | EOL通知 | |
| PDF 1.15 MB | EOL通知 | |
| PDF 123 KB | ガイド | |
| PDF 645 KB | EOL通知 | |
| PDF 611 KB | 製品変更通知 | |
| PDF 611 KB | 製品変更通知 | |
| PDF 546 KB | EOL通知 | |
| PDF 548 KB | EOL通知 | |
| PDF 27 KB | 製品変更通知 | |
| PDF 24 KB | 製品変更通知 | |
| PDF 223 KB | 製品変更通知 | |
| PDF 113 KB | アプリケーションノート | |
| PDF 298 KB | 製品変更通知 | |
| PDF 729 KB | 製品変更通知 | |
| PDF 38 KB | 製品変更通知 | |
| PDF 16 KB | 製品変更通知 | |
| PDF 47 KB | 製品変更通知 | |
| PDF 35 KB | 製品変更通知 | |
| PDF 42 KB | 製品変更通知 | |
| PDF 80 KB | 製品変更通知 | |
| PDF 44 KB | 製品変更通知 | |
| PDF 38 KB | 製品変更通知 | |
| PDF 26 KB | 製品変更通知 | |
| PDF 134 KB | 製品変更通知 | |
| PDF 49 KB | 製品変更通知 | |
| PDF 40 KB | 製品変更通知 | |
| PDF 274 KB | 製品変更通知 | |
| PDF 44 KB | EOL通知 | |
| PDF 44 KB | 製品変更通知 | |
31 items
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設計・開発
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Processing table
Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
ご購入 / サンプル |
|
|---|---|---|---|---|---|---|
| 型名 | ||||||
| PLCC | 32 | C | Yes | Tube | サンプルを入手, | |
| PLCC | 32 | C | Yes | Reel |
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