特長
- Logic and Mixed-Signal Circuits
- Highly Versatile Macro Cells
- Read Back Protection (Read Lock)
- 1.8V (±5%) to 5V (±10%) Supply
- Operating Temperature Range: -40°C to 85°C
- RoHS-Compliant/Halogen-Free
- Pb-Free TDFN-12 2.5mm x 2.5mm Package
- Macrocells Overview
- 8-Bit Successive Approximation Register Analog to Digital Converter (SAR ADC)
- Power-On Reset Device (POR)
- Voltage Reference (VREF)
- RC Oscillator (RC OSC)
- 4 Counter/Delay Generators (CNT/DLY)
- 4 D Flip-Flop/Latches (DFF)
- 3 Digital Comparators (DCMP) or Pulse Width Modulator (PWM)
- 2 Analog Comparators (ACMP)
- 11 Combinatorial Look-Up Tables (LUT)
- Slave SPI
- Configurable I/O Pins (Open Drain, Push-Pull, Schmitt Trigger Input, Low Voltage Digital Input and Analog I/O)
- Delay (20ns/40ns/60ns/80ns)
- Pipe Delay
SLG46400 Block Diagram
説明
The SLG46400 provides a small, low-power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the I/O pins, and the macrocells of the SLG46400. This highly versatile device allows for a wide variety of mixed-signal functions to be designed within a very small, low-power single integrated circuit.
アプリケーション
- Personal Computers and Servers
- PC Peripherals
- Consumer Electronics
- Data Communications Equipment
- Handheld and Portable Electronics
