特長
- Pinout-optimized MRDIMM PCB layout
- DDR5 server speeds up to 12800MT/s
- x4 or x8 operation on both host and DRAM interfaces
- Rank and Mux Modes
- Supports up to 2 ranks per pseudo-channel in Mux Mode
- Supports up to 4 ranks in Rank Mode
- Link CRC
- Dual frequency contexts
- DFE/CTLE self-training mode
- Supports SDP, DDP, and 3DS DRAM types
- Provides access to internal control words for configuring device features and adapting to different MRDIMM and system applications
- Loopback and pass-through modes
- Training support features for DQ and MDQ interfaces
説明
The RRG5102X-B10 is a DDR5 Multiplexing Data Buffer (MDB). Its primary function is to demultiplex and buffer data from the host CPU to DRAMs. The host side can operate as x4 with two strobes, or x8 with one. There are two separate DRAM interfaces, each of which can operate as x4 or x8.
The RRG5102X-B10 supports both Mux Mode and Rank Mode. In Mux Mode, the host interface runs at twice the speed of the DRAM interfaces and carries up to two ranks for each of two multiplexed pseudo-channels, which can transmit and receive in the same direction simultaneously. In Rank Mode, the host and DRAM interfaces run at the same speed, and up to four ranks are supported.
The RRG5102X-B10 also has an input-only control bus interface that is connected to a DDR5MRCD02, as well as a dedicated pin for ZQ calibration and loopback outputs for test purposes.
パラメータ
| 属性 | 値 |
|---|---|
| Product Type | Data Buffer |
| Function | DDR5 Gen 2 MRDIMM MDB |
| Application System | Server |
パッケージオプション
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| FCCSP | 3.23 x 7.8 x 0.9 | 78 | 0.5 |
アプリケーション
- MRDIMM Modules for Enterprise Servers
