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36-Mbit DDR™ II+ SRAM 2-word Burst Architecture (2.0 Cycle Read latency)

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: LBGA
Pkg. Code: pkg_6857
Lead Count (#): 165
Pkg. Dimensions (mm): 15 x 13 x 1.4
Pitch (mm): 1

環境及び輸出分類情報

Moisture Sensitivity Level (MSL) 3
RoHS (RMQCHA3618DGBA-222#AC0) 英語日本語
Pb (Lead) Free Yes
ECCN (US)
HTS (US)

製品スペック

Pkg. Type LBGA
Carrier Type Tray
Moisture Sensitivity Level (MSL) 3
Architecture DDR-II+ CIO without ODT
Burst Length (Words) 2
Data Width (bits) 18000
Density (Kb) 36000
Frequency (Max) (MHz) 450
Lead Compliant No
Lead Count (#) 165
Length (mm) 15
MIN Frequency (MHz) 250
MOQ 1
Pb (Lead) Free Yes
Pkg. Dimensions (mm) 15 x 13 x 1.4
Read Latency (Clock) 2
Tape & Reel No
Thickness (mm) 1.4
Width (mm) 13

説明

The RMQCHA3636DGBA is a 1, 048, 576-word by 36-bit and the RMQCHA3618DGBA is a 2, 097, 152-word by 18-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, High-Speed, low voltage, high density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.