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1-to-8 Differential Clock Buffer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:SSOP
Pkg. Code:PVG48
Lead Count (#):48
Pkg. Dimensions (mm):15.9 x 7.5 x 2.3
Pitch (mm):0.64

環境及び輸出分類情報

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

製品スペック

Pkg. TypeSSOP
Lead Count (#)48
Pb (Lead) FreeYes
Carrier TypeTube
Advanced FeaturesProgrammable Clock, Spread Spectrum
App Jitter CompliancePCIe Gen1
C-C Jitter Max P-P (ps)50
Chipset ManufacturerIntel
Chipset NameDB800
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)200
Input TypeHCSL
Inputs (#)1
Length (mm)15.9
MOQ600
Moisture Sensitivity Level (MSL)1
Output Banks (#)1
Output Freq Range (MHz)200
Output Skew (ps)50
Output TypeHCSL
Output Voltage (V)3.3
Outputs (#)8
Package Area (mm²)119.3
Pb Free Categorye3 Sn
Pitch (mm)0.64
Pkg. Dimensions (mm)15.9 x 7.5 x 2.3
Prog. ClockYes
Prog. InterfaceSMBUS
Qty. per Carrier (#)30
Qty. per Reel (#)0
Reference OutputNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumYes
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)2.3
Width (mm)7.5

説明

The CV141 differential buffer is compliant with Intel DB800 specifications. It is intended to distribute the SRC (serial reference clock) as a companion chip to the main clock of the CK409, CK410/CK410M, CK410B, etc. PLL is off in bypass mode and has no clock detect.