特長
- 16-bit pipelined ADC core
- CMOS or LVDS DDR digital outputs
- Duty cycle stabilizer
- Fast OuT-of-Range (OTR) detection
- Flexible input voltage range: 1 V to 2 V (p-p) with 6 dB programmable fine
- gain
- INL ±
- 4 LSB, DNL ±
- 0.95 LSB (typical)
- Input bandwidth, 600 MHz
- Offset binary, 2's complement, gray code
- Power dissipation, 570 mW
- Power-down and Sleep modes
- Sample rate, 125 Msps
- SFDR, 90 dBc
- Single 3 V supply
- SNR, 73 dB
- SPI Interface
説明
The ADC1610S125HN is a single channel 16-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rate of 125 Msps. Pipelined architecture and output error correction ensure the ADC1610S125HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, because of a separate digital output supply. It supports the Low Voltage Differential Signaling (LVDS) Double Data Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.
