特長
- 2:1 LVDS MUX
- One LVDS output pair
- Two differential clock inputs can accept: LVPECL or LVDS
- Maximum input/output frequency: 2.5GHz
- Translates LVCMOS/LVTTL input signals to LVDS levels by using a resistor bias network on nPCLK0, nPCLK1
- RMS additive phase jitter: 0.06ps (typical)
- Propagation delay: 600ps (maximum)
- Part-to-part skew: 350ps (maximum)
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
説明
The 854S01I is a high performance 2:1 Differential-to-LVDS Multiplexer. The 854S01I can also perform differential translation because the differential inputs accept LVPECL or LVDS levels. The 854S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.