特長
- Sixteen differential LVPECL output pairs
- CLK, nCLK input pair
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
- Maximum output frequency: 500MHz
- Translates any single-ended input signal to 2.5V LVPECL levels with a resistor bias on nCLK input
- Output skew: 50ps (maximum)
- Part-to-part skew: 250ps (maximum)
- Propagation delay: 2ns (maximum)
- 3.3V core, 2.5V output operating supply
- 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
説明
The 8530 is a low skew, 1-to-16 Differential-to- 2.5V LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to-peak input voltages as small as 150mV, as long as the common mode voltage is within the specified minimum and maximum range. Guaranteed output and part-to-part skew characteristics make the 8530 ideal for those clock distribution applications demanding well defined performance and repeatability.
サポートコミュニティ
-
RZ/V2L Smarc Pmic Kit: Kernel panic
... node image_buf@0[ 1.842865] u-dma-buf udmabuf0: driver version = 3.2.4[ 1.848030] u-dma-buf udmabuf0: major number = 242[ 1.853023] u-dma-buf udmabuf0: minor number = 0[ 1.857840] u-dma-buf udmabuf0: phys address = 0x00000000b9000000[ 1.864126] u-dma-buf udmabuf0: buffer size ...
2022年7月13日
