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ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation)
Low Skew,1-to-22 Differential-to-HSTL Fanout Buffer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TQFP
Pkg. Code:EDG64
Lead Count (#):64
Pkg. Dimensions (mm):10.0 x 10.0 x 1.0
Pitch (mm):0.5

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)64
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)160
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Additive Phase Jitter Typ RMS (fs)40
Additive Phase Jitter Typ RMS (ps)0.04
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)500
Input TypeCML, HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)10
MOQ160
Output Banks (#)1
Output Freq Range (MHz)500
Output Skew (ps)80
Output TypeHSTL
Output Voltage (V)1.8
Outputs (#)22
Package Area (mm²)100
Pitch (mm)0.5
Pkg. Dimensions (mm)10.0 x 10.0 x 1.0
Pkg. TypeTQFP
Product CategoryClock Buffers & Drivers, Clock Multiplexers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1
Width (mm)10

説明

The 8524 is a low skew, 1-to-22 Differential-to-HSTL Fanout Buffer . The 8524 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the OE pin. The 8524's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.