パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | TQFP |
| Pkg. Code: | PNG64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 14.0 x 14.0 x 1.4 |
| Pitch (mm): | 0.8 |
環境及び輸出分類情報
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
製品スペック
| Lead Count (#) | 64 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tray |
| Architecture | Dual FIFO |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 2 |
| Family Name | DualSync |
| I/O Frequency (MHz) | 100 - 100 |
| I/O Type | 3.3 V LVTTL |
| Interface | Synchronous |
| Length (mm) | 14 |
| MOQ | 270 |
| Moisture Sensitivity Level (MSL) | 3 |
| Organization | 256 x 9 |
| Package Area (mm²) | 196 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.8 |
| Pkg. Dimensions (mm) | 14.0 x 14.0 x 1.4 |
| Pkg. Type | TQFP |
| Qty. per Carrier (#) | 90 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.4 |
| Width (mm) | 14 |
| 掲載 | No |
72V801 に関するリソース
説明
The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.