パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | PLCC |
| Pkg. Code: | PLG52 |
| Lead Count (#): | 52 |
| Pkg. Dimensions (mm): | 19.0 x 19.0 x 3.63 |
| Pitch (mm): | 1.27 |
環境及び輸出分類情報
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
製品スペック
| Lead Count (#) | 52 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 3 |
| Access Time (ns) | 25 |
| Architecture | Dual-Port |
| Bus Width (bits) | 8 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 16 |
| Function | Busy, Interrupt, Master |
| I/O Type | 3.3 V LVTTL |
| Interface | Async |
| Length (mm) | 19 |
| MOQ | 240 |
| Organization | 2K x 8 |
| Package Area (mm²) | 361 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 19.0 x 19.0 x 3.63 |
| Pkg. Type | PLCC |
| Qty. per Carrier (#) | 24 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 3.63 |
| Width (mm) | 19 |
71V321 に関するリソース
説明
The 71V321 is a high-speed 2K x 8 dual-port static RAM with internal interrupt logic for interprocessor communications. The device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power-down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode.