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256K x 18, 3.3V/2.5V Dual-Port RAM, Interleaved I/O's

パッケージ情報

Lead Count (#) 208
Pkg. Code BF208
Pitch (mm) 0.8
Pkg. Type CABGA
Pkg. Dimensions (mm) 15.0 x 15.0 x 1.4

環境及び輸出分類情報

Pb (Lead) Free No
Moisture Sensitivity Level (MSL) 4
ECCN (US)
HTS (US)

製品スペック

Lead Count (#) 208
Pb (Lead) Free No
Carrier Type Tray
Access Time (ns) 10
Architecture Dual-Port
Bus Width (bits) 18
Core Voltage (V) 2.5
Density (Kb) 4608
Function Busy, Interrupt, JTAG, Master, Semaphore, Slave, Sleep Mode
I/O Type 2.5 V LVTTL, 3.3 V LVTTL
Interface Async
Length (mm) 15
MOQ 21
Moisture Sensitivity Level (MSL) 4
Organization 256K x 18
Package Area (mm²) 225.0
Pb Free Category e0
Pitch (mm) 0.8
Pkg. Dimensions (mm) 15.0 x 15.0 x 1.4
Pkg. Type CABGA
Qty. per Carrier (#) 126
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Temp. Range 0 to 70°C
Thickness (mm) 1.4
Width (mm) 15

説明

The 70T631 is a high-speed 256K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.