特長
- Extremely low skew outputs (50ps maximum)
- Packaged in 16 pin TSSOP
- Pb (lead) free package
- Low power CMOS technology
- Operating Voltages of 2.5 V to 5 V
- Output Enable pin tri-states outputs
- 5 V tolerant input clocks
- Input/Output clock frequency up to 200 MHz
- Input clock multiplexer simplifies clock selection
- Industrial temperature
説明
The 552-02 is a low skew, single-input to eight-output clock buffer. The device offers a dual input with pin select for switching between two clock sources. It is part of Renesas' ClockBlocks™ family. See the 553 for a 1 to 4 low skew buffer. For more than 8 outputs see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.
パラメータ
| 属性 | 値 |
|---|---|
| Function | Buffer, Multiplexer |
| Outputs (#) | 8 |
| Output Type | LVCMOS |
| Output Freq Range (MHz) | - |
| Input Type | LVCMOS |
| Output Banks (#) | 1 |
| Output Voltage (V) | 2.5, 3.3, 5 |
| Output Skew (ps) | 50 |
パッケージオプション
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| TSSOP | 5.0 x 4.4 x 1.0 | 16 | 0.65 |