Features
- Extremely low skew outputs (50ps maximum)
- Packaged in 16 pin TSSOP
- Pb (lead) free package
- Low power CMOS technology
- Operating Voltages of 2.5 V to 5 V
- Output Enable pin tri-states outputs
- 5 V tolerant input clocks
- Input/Output clock frequency up to 200 MHz
- Input clock multiplexer simplifies clock selection
- Industrial temperature
552-02 - Block Diagram
Description
The 552-02 is a low skew, single-input to eight-output clock buffer. The device offers a dual input with pin select for switching between two clock sources. It is part of Renesas' ClockBlocks™ family. See the 553 for a 1 to 4 low skew buffer. For more than 8 outputs see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.
Parameters
| Attributes | Value |
|---|---|
| Temp. Range (°C) | -40 to 85°C |
| Product Category | Clock Buffers & Drivers, Clock Multiplexers |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| TSSOP | 5.0 x 4.4 x 1.0 | 16 | 0.65 |
Support Communities
-
552-02(S) Clock Mux - Additive RMS Jitter Specification
Hello,I'm looking for the the Clock-MUX with low RMS Noise jitter. I found out 552-2(S) device but when I checked datasheet it's saying 50fS Additive Jitter in the start of the specification but in the table it's saying 50pS. Probably there is a ...
Dec 4, 2024
Support Communities
Get quick technical support online from Renesas Engineering Community technical staff.
Knowledge Base
Browse our knowledge base for helpful articles, FAQs, and other useful resources.
