Dual 1:4 Fanout Buffer with 1.0V Single-Ended Inputs and Outputs
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Overview
Description
The 9SBV0802 provides two banks of four 1.05V LVCMOS outputs. Each bank has its own input. There are three OE pins. Two OE pins control two outputs each and one OE pin controls four outputs. One 9SBV0802 allows one PCH to easily support four CPU's with point to point routing of the PM signals. Two 9SBV0802 devices allow one PCH to easily support up to eight CPU's with point-to-point routing of the PM signals.
Features
- Eight 1–48MHz 1.05V LVCMOS outputs
- Additive cycle-to-cycle jitter < 8ps
- Output-to-output skew within a bank < 50ps
- Output-to-output skew between banks < 100ps
- 1.8V power supply, 15mW typical power consumption
- Three OE pins
- 1.05V LVCMOS inputs with VREF pin
- Space saving 4 x 4 mm 20-VFQFPN
Documentation
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Datasheet
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Application Note
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Application Note
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Application Note
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Application Note
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Overview
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Overview
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Overview
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PDF734 KB
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Product Change Notice
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PDF728 KB
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Product Change Notice
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PDF2.97 MB
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Product Change Notice
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Product Change Notice
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PDF5.61 MB
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Product Change Notice
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Report
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Design & Development
Models
ECAD Models
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play_circle_filledVideos & Training
Low-jitter LVCMOS Fanout Clock Buffers by IDT
Video List
