The Renesas PCIe® Gen3 retimer family offers the industry a blend of top analog performance, lower power and the most system-level features in signal retimers optimized for demanding 2.5Gbps, 5Gbps and 8Gbps applications in computing, storage and communications.

Features of the Renesas PCI retimers include:

  • 8, 16 or 32-channel signal retimer (4, 8 or 16 PCIe lanes)
  • Advanced signal conditioning features
  • Advanced diagnostic features
  • Protocol-specific features
  • Advanced power-saving features
  • I2C programming interface
  • Commercial and industrial temperature

Industry-leading PCIe Retimer Products

The Renesas PCIe retimers (signal conditioners) are used to improve signal integrity for enhancing system performance and reliability across long PCB traces or cables. The PCIe retimers remove both random and deterministic jitter from the input signal eliminating inter-symbol interference (ISI), and reset the output jitter budget. The devices provide 8, 16 or 32 differential, 8GT/s PCI Express 3.0 channels, supporting 4, 8, or 16 lanes, respectively. The PCIe retimers also fully support PCI Express 5GT/s and 2.5GT/s features.

The Renesas PCIe retimers feature a full CDR architecture with adaptive Decision Feedback Equalizer (DFE) and extensive control options accessed via serial interface. The devices feature a per-channel mini controller that enables self-configuration for optimum performance using automatic adjustment via equalization training. The mini controller manages the functions of each link including 128/130b coding, down-shift for compatibility with PCIe Gen1 and Gen2, receiver detection and termination control.

All of the Renesas PCIe retimers implement a non-linear, adaptive, multi-stage equalizer, with analog front-end and 5-tap DFE. The feedback filter of the DFE allows ISI distortion from previous symbols to be removed completely, and with digital quantization eliminates filter output noise. Filter tap weights can be adjusted via serial configuration.

Default equalization, de-emphasis, and TX full-scale swing settings are pin-programmable. The PCIe retimers support extensive configurability for every operating feature configuration as an SMBus or I2C slave device. Additionally, they provide a master mode of operation to download configuration data from a serial-EEPROM. The serial bus also allows for inspection of the numerous status registers.

The PCIe retimers provide a default signal termination setting of 100 ohms nominal for calibrated input terminations and can be programmed to 85 ohms nominal if desired. The input signal detection thresholds can be adjusted for the valid active signal level, supporting electrical idling.

In addition, the PCIe retimers support both JTAG and AC JTAG to facilitate production board testing, and a built-in pattern generator is provided to enable convenient lab and field tests. Extensive software is available to support test and debug, including a PC utility for setting and saving device configuration, and an eye capture tool supporting remote in-field diagnosis.

The retimer devices use supply voltages of 1.0V, 1.8V, and 3.3V. Multiple features are provided to minimize power consumption, including Active State Power Management (ASPM) of each link.

About PCIe Retimers

High-speed signals can deteriorate to unacceptable levels by the time they reach end receivers, due to transmitter, receiver, and channel characteristics. PCIe retimers ensure minimized jitter and maximized eye opening at the target receiver by compensating for cable and PCB trace attenuation and ISI jitter. This is accomplished by boosting the transmitted signal, by equalizing the received signal, or by doing both when either option by itself is not sufficient due to channel length or due to discontinuities generated by vias and connectors. Renesas retimers are ideal for solving signal integrity problems in blade servers, enterprise storage, communication systems, and cloud computing.

IDT PCIe 3.0 Retimers for High-Speed 8Gbps Signal Conditioning

Description

IDT PCI Express 3.0 retimer for high-speed signal conditioning up to 8Gbps. Delivers signal quality over extended distances while offering simplified design by alleviating board layout constraints. These devices incorporate advanced receive equalization and transmit de-emphasis capabilities, as well as diagnostic features that help IDT customers achieve a simplified design with faster time-to-market. The devices all offer power savings modes for the lowest-possible power consumption. Presented by Ken Curt, Product Manager, Integrated Device Technology, Inc. Learn more at www.idt.com/go/PCIeSIP.

Transcript

Hi, My name's Ken Curt . I'm project manager for IDT's Signal Integrity product line. Today I'd like to talk about our PCI Express 3.0 Retimer products for high speed eight gigabit per second signal conditioning.
 
What I'm showing here is a diagram of a server. Now this diagram shows multiple uses for IDT Signal Conditioning products, including for SAS, SATA, USB 3.0 and other protocols. However, in the middle of this picture, with the bright red border, shows our PCI Express Gen3 Retimer. And in this case, you see it's connected up to IDT's new Enterprise Flash Controller as one example application.
 
Another common application is the use of signal conditioners in blade servers. This diagram shows the signal conditioner on each of two blades within the chassis, and the purpose of the conditioner is to get the signal across this long back plane, which can be up to 20 inches or even 30 inches of trace, when the trace on the blades themselves is considered. So crossing a trace of that long with two connectors in the path is a challenge, especially at eight gigabit per second PCI Express. And that's the purpose for IDT's Retimer Product. In this case, it's shown as the TO816P, which is an eight lane 16-channel Retimer. 
 
This slide shows the block diagram of our Retimer, again, the 16-channel device. You can see, going from top to bottom, the 16 lanes. But at the very top, the interface to the real world, the physical layer interface, begins with the receiver and transmitter equalizers. Below that you'll see the serializer, deserializer, the SerDes. And below that you'll see a micro-controller. Each channel of this device has its own micro-controller for coordinating various initialization and power management functions in real-time, within this device. As we go below the micro-controller, you'll see a routing function. That supports simple routing, such as lane reversal, polarity swapping, and other simple things that are like that. It's not a packet switch, of course. Off to the right side of this image, you'll see the two I2C or SMBus ports. There's a master and slave port, to give complete flexibility in your system application. And below that you'll see the configuration vector, which is important to achieving the very low 10^-12 error rate that PCI Express Gen3 automatically negotiates to. There’s also a JTAG interface, and immediately below that you see the clock. A retimer device, of course, requires a reference clock input.
 
To hit the highlights of our Gen3 Retimer, first of all, it's fully PCI Express Gen3 specification compliant. It's also fully downwards compatible to the 5-gigabit and Gen2 and 2.5-gigabit Gen1 specifications. I showed earlier one version of this device, the 16 channel version. We're actually planning for two versions of the product. There's the 16 channel version, which will come in a 196-pin BGA package. There's also the 100-pin BGA package which is footprint compatible with our four-lane repeater device. So that's a four-lane retimer which is the T0808P version. To go into the rest of the features, the receiver begins with a high-sensitivity, of course, high-speed analog CTLE Equalizer Stage, or continuous linear equalizer, and that's followed by a decision feedback equalizer, a DFE, or a digital equalizer stage. That exceeds PCI Express Gen3 specifications and provides the compensation for channel loss and jitter, and ISI or intersymbol interference that's picked up from vias and other discontinuities, connectors and things like that in the channel.  The transmitter portion of this device includes a four-tap FIR filter. This also exceeds PCI Express Gen3 requirements and its purpose is to support output waveform shaping or pre-compensation of the signal for driving across long traces. Not only can we adjust the transmit amplitude, we can adjust the waveform characteristics, or shape, we can adjust the slew rates, as well as the IO terminations for input and output. So there's tremendous flexibility in the IO capabilities and configuration of this device. A very important function, and unique to PCI Express Gen3, is the automatic negotiation process for Gen3 configuration parameters. So the receiver, equalizer and the transmitter stage all have to be configured. This is handled by a new procedure or protocol within the PCI Express Gen3 standard. In addition to the automatic equalization, our device automatically adapts for different rate changes and optimizes for the actual rate of operation. So for example, if someone plugs in a Gen1 host plus adapter or graphics card, for example, our device will optimize for the 2.5 gigabit per second data rate. Very important at the high eight-gigabit per second performance is automatic calibration. So our retimers automatically calibrate for output skews, they'll calibrate the termination impedances and other functions within this device to make the signals and the timing as close to ideal as possible. Of course, at eight gigabits per second, all these margins become very important. Our device has full support for automatic power-saving states, such as the L0S state that Intel's been promoting heavily, lately. If the root complex and end point device go into a power-down state our device will, of course, follow that to achieve the lowest overall system power that's possible. Our retimers support either independent clocks or a common spread spectrum clock. So you have multiple options in terms of clocking. Our devices also support hot swapping. And finally, the retimers offer built-in instrumentation capabilities. There's a built in pattern generator and checker function, as well as an on-die scope capture capability. And this is very important. If you think back to that blade server application, where you have retimer parts on two blades at each end of the channel, from the transmitter side, you can now generate a pattern with the pattern generator function. That pattern can output a signal and you can adjust the output swing and emphasis characteristics, the slew rate. You've got full control over the output characteristics. Now that signal will then pass down the channel to the receiver. Now if the receiver is our retimer you have the ability to capture the input waveform either at the pin or after equalization. And of course, you can adjust your receiver characteristics, as well, input equalization as well as input sensitivity. So now you have the ability to margin your channel to provide optimum margins for operation. Of course PCI Express Gen3 can do that all automatically. As part of this instrumentation feature, you can output the data to a Windows based PC and look at it under a GUI, a user interface that IDT also provides. So it's software accessible. Being software accessible means it's very convenient to debug within the lab but also once the system is deployed within the field you could conceivably even access the information remotely, via the internet. So a very powerful tool with very powerful capabilities built into this retimer. 
 
To wrap up the advantages that IDT brings in terms of signal conditioning products, we have best in class analog performance, and this is hereditary. It's based on our experience with building high-speed memory buffers, the physical layout interface of those, built on our experience with PCI switching and SRIO switching and other devices. So we have excellent skills in the analog domain. We also consider these devices to be server-class or server-grade signal conditioning devices. And by that we mean that they have a lot of configuration capabilities, including the ability for automatic training under PCI Express Gen3. We wrap around our semi-conductor products a full suite of hardware development tools. I'd already mentioned the GUI that we have available. We have the instrumentation capabilities in these devices to make debug and design easy. And, finally, we have an excellent support team for our Signal Integrity products. The engineers are skilled in the unique requirements around signal conditioning and the unique problems that they present within your system. 
 
So I'd like to conclude on that note, and thank you for your time and attention.