Description
The R8C/36A Group is supported only for customers who have already adopted these products. The RL78/G14, RL78/G1F Groups are recommended for new designs.
The R8C/36A Group of single-chip MCUs incorporate the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1Mb of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed to maximize EMI/EMS performance. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system components. The R8C/36A Group have data flash (1KB × 4 blocks) with the background operation (BGO) function.
Applications
- Electronic Household Appliances
- Office Equipment
- Audio Equipment
- Consumer Equipment
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|
| R5F21364ANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | ||
| R5F21364ANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | ||
| R5F21364ANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21364ANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21365ANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21365ANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21365ANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21365ANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21366ANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21366ANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21366ANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21366ANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21367ANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21367ANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21367ANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21367ANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21368ANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21368ANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F21368ANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F21368ANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F2136AANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F2136AANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F2136AANFP#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F2136AANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F2136CANFA#V2 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F2136CANFA#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | -20 to +85 | |
| R5F2136CANFP#V2 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
| R5F2136CANFP#X6 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | LFQFP | 64# | -20 to +85 |
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- Application NoteAI-generated Summary: The document explains how to implement single master control communication using the R8C/35C Group EC bus interface to issue a restart condition. It demonstrates sending and receiving data with a digital color sensor (S11059-02DT) by alternating master transmission and reception. The restart condition allows switching data direction without issuing a stop condition, complying with I²C protocol standards such as 7-bit slave addressing, approximately 357 kHz transfer rate, and single master communication.Related Files:
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- Application NoteAI-generated Summary: The document explains how to implement single master control communication using the R8C/35C Group EC bus interface to issue a restart condition. It demonstrates sending and receiving data with a digital color sensor (S11059-02DT) by alternating master transmission and reception. The restart condition allows switching data direction without issuing a stop condition, complying with I²C protocol standards such as 7-bit slave addressing, approximately 357 kHz transfer rate, and single master communication.Related Files:
- Application NoteAI-generated Summary: The document explains how to register and uninstall Call Walker within the High-performance Embedded Workshop (HEW). It guides users to launch HEW without opening a workspace, access the Tools Administration menu, and register the Call Walker tool by specifying the registration file path. After registration, Call Walker version 2.3 appears in the menu. Upon uninstalling HEW, users must manually delete the remaining Call Walker directory. It also provides Renesas Electronics website and contact information for support. The revision history notes the first edition release date.
- Application NotePDF 424 KB R01AN1648EJ0101 Rev.1.01 Mar 31, 2013AI-generated Summary: CAN communication requires initial settings including clock, bit timing, baud rate, and acceptance filters. Bit timing divides each bit into three segments: Synchronization Segment (SS), Time Segment 1 (TSEG1), and Time Segment 2 (TSEG2). TSEG1 and TSEG2 determine the sampling point and compensate for network delays and phase errors. The timing unit is time quanta (Tq), influenced by clock frequency and baud rate prescaler. Segment settings have specific ranges and restrictions to ensure proper synchronization and communication.
- Application NotePDF 440 KB REJ05B1351-0102 Rev.1.02 Jun 08, 2012AI-generated Summary: The document explains the use of UART2 Special Mode 1 for I2C bus communication in the R8C/35C group, focusing on slave transmit and receive operations. It details the initialization of system clocks and UART2 registers, interrupt handling for receive, transmit, and stop condition detection, and the process of acknowledging slave addresses. Data transmission and reception are managed via the U2TB register with specific procedures for each byte. Timing charts illustrate the communication flow between master and slave devices.Related Files:
- Application NoteAI-generated Summary: The document explains power control for the R8C/35A Group using wait mode. It details how the MCU switches operating modes, entering wait mode with low-speed on-chip oscillator settings and exiting via timer RA interrupts. The system clock switches from low-speed to high-speed upon exit. Sample programs demonstrate these operations, including memory usage specifics. Key register settings and instructions for managing wait mode are provided.Related Files:View More (120)
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- IDE and Coding ToolAdd new CPU types to the compiler package (for High-performance Embedded Workshop V4 or later)
- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerC/C++ Compiler Package for R8C Family and M16C Family (R32C/M32C/M16C) , * Packed the following three compiler packages : [Content] C Compiler Package for R32C Series, C Compiler Package for M32C Series [M3T-NC308WA], and C/C++ Compiler Package for M16C Series and R8C Family [M3T-NC30WA]. They are bundled with the simulator debugger and High-performance Embedded Workshop.
- EmulatorA full-spec emulator available for full bus trace. This can be used for various devices by MCU units or connection parts exchange. [Compatible software(GUI): High-performance Embedded Workshop] [Target devices: RX610, R8C/5x, R8C/3x, M16C/64, RS-4 and others.]
- EmulatorOn-Chip Debugging Emulator for R8C, M16C, H8S, H8 and 740 families. E8a is also used as a device programmer for Renesas microcomputers. This product is E8 emulator's successor.
- EmulatorMCU unit for the R8C/3x Series [for E100]. An MCU-dependent converter board is required.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit] [Support MCU/MPU and devices: SuperH RISC engine, R8C, M16C, H8SX, H8S, H8, 740]
- Programmer (Unit/SW)Flash memory programming software. [Support MCU/MPU and devices: SuperH RISC engine, RX, R8C, M16C, H8SX, H8S, H8, 740]
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- IDE and Coding ToolAdd new CPU types to the compiler package (for High-performance Embedded Workshop V4 or later)
- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerC/C++ Compiler Package for R8C Family and M16C Family (R32C/M32C/M16C) , * Packed the following three compiler packages : [Content] C Compiler Package for R32C Series, C Compiler Package for M32C Series [M3T-NC308WA], and C/C++ Compiler Package for M16C Series and R8C Family [M3T-NC30WA]. They are bundled with the simulator debugger and High-performance Embedded Workshop.
- EmulatorA full-spec emulator available for full bus trace. This can be used for various devices by MCU units or connection parts exchange. [Compatible software(GUI): High-performance Embedded Workshop] [Target devices: RX610, R8C/5x, R8C/3x, M16C/64, RS-4 and others.]View More (22)
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Data Flash of R8C/2B and R8C/36C
Hi,We use R8C/2B as main MCU for display of treadmill. Previously, we set WDT at 260ms as the erase time and write time were 130ms respectively.Recently, we found the controller is forecored to reset continuously and checked it's caused by the whole progress of erase ...
Nov 23, 2009
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