Skip to main content
Renesas Electronics Corporation - June is Pride Month, a month to raise awareness of the rights and the culture of the LGBTQ+ community

Description

The R8C/24 Group is supported only for customers who have already adopted these products. The RL78/G14 Group is recommended for new designs.

This MCU is built using the high-performance silicon gate CMOS process using the R8C CPU core and is packaged in a 48-pin plastic molded LQFP. This MCU operates using sophisticated instructions featuring a high level of instruction efficiency. With 1Mb of address space, it is capable of executing instructions at high speed. This MCU is equipped with one CAN module and suited to in-vehicle or FA networking. Furthermore, the data flash (1KB x 2 blocks) is embedded in the R8C/23 Group. The difference between R8C/22 and R8C/23 Groups is only the existence of the data flash. Their peripheral functions are the same.

Applications

  • Automotive
Part NumberStatusSamplesStockRoHSPackageBudgetary Price (USD)RAM (KB)Lead Count (#)Temp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
R5F21244SDFP#V2NRNDN/AIn StockContactLQFP1ku | $5.791KB52#-40 to +85CHINAJAPAN
R5F21244SDFP#X6ObsoleteN/AIn StockContactLQFP1KB52#-40 to +85
R5F21244SNFP#V2NRNDN/AOut of StockContactLQFP1ku | $3.731KB52#-20 to +85CHINAJAPAN
R5F21244SNFP#X6ObsoleteN/AOut of StockContactLQFP1KB52#-20 to +85
R5F21244SNLG#U0ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA1KB64#-20 to +85
R5F21245SDFP#V2NRNDN/AOut of StockContactLQFP1ku | $4.032KB52#-40 to +85CHINAJAPAN
R5F21245SDFP#X6NRNDN/AOut of StockContactLQFP2KB52#-40 to +85
R5F21245SNFP#V2NRNDN/AOut of StockContactLQFP1ku | $3.772KB52#-20 to +85CHINAJAPAN
R5F21245SNFP#X6NRNDN/AOut of StockContactLQFP2KB52#-20 to +85
R5F21246SDFP#V2NRNDN/AIn StockContactLQFP1ku | $5.132KB52#-40 to +85CHINAJAPAN
R5F21246SDFP#X6NRNDN/AOut of StockContactLQFP2KB52#-40 to +85
R5F21246SNFP#V2NRNDN/AIn StockContactLQFP1ku | $4.952KB52#-20 to +85CHINAJAPAN
R5F21246SNFP#X6NRNDN/AOut of StockContactLQFP1ku | $4.652KB52#-20 to +85CHINAJAPAN
R5F21246SNLG#U0ObsoleteN/AIn StockRoHS:EN
RoHS:JA
TFLGA2KB64#-20 to +85
R5F21247SDFP#V2NRNDN/AOut of StockContactLQFP1ku | $4.342.5KB52#-40 to +85CHINAJAPAN
R5F21247SDFP#X6NRNDN/AOut of StockContactLQFP2.5KB52#-40 to +85
R5F21247SNFP#V2NRNDN/AIn StockContactLQFP1ku | $4.912.5KB52#-20 to +85CHINAJAPAN
R5F21247SNFP#X6NRNDN/AOut of StockContactLQFP1ku | $4.972.5KB52#-20 to +85CHINAJAPAN
R5F21248SDFP#V2NRNDN/AOut of StockContactLQFP1ku | $4.493KB52#-40 to +85CHINAJAPAN
R5F21248SDFP#X6NRNDN/AOut of StockContactLQFP3KB52#-40 to +85
R5F21248SNFP#V2NRNDN/AIn StockContactLQFP1ku | $6.413KB52#-20 to +85CHINAJAPAN
R5F21248SNFP#X6NRNDN/AOut of StockContactLQFP1ku | $5.263KB52#-20 to +85CHINAJAPAN

Support Communities

  1. Can i Write in the R8C/24 controller ROM?

    ... area of R8c/25 but in R8C/24 there is NO Data Flash.I want to store my calibrated Multiplying Factors in my R8C/24 Micro Controller.I am using 32KB ROM version of R8C/24 Group.My code size is 15KB. So Can i use ...

    Jul 14, 2009
  2. R8C/24 : Basic use of timer RD

    R8C/24 : Basic use of timer RD

    Aug 31, 2007
  3. Can i Write in the R8C/24 controller ROM?

    ... area of R8c/25 but in R8C/24 there is NO Data Flash.I want to store my calibrated Multiplying Factors in my R8C/24 Micro Controller.I am using 32KB ROM version of R8C/24 Group.My code size is 15KB. So Can i use ...

    Jul 14, 2009
View All Results from Support Communities (9)

Knowledge Base

  1. (R8C) Are there any hardware precautions for accurate A/D conversion?

    In order to perform A/D conversion, it is necessary to fully charge the internal capacitor, but if the impedance of the A/D conversion target is high, the discharge and charge will take time and the conversion value will not be accurate. For correct A/D ...

    Jun 19, 2006
  2. Can a parallel programmer verify the program in condition the ROM code protect is enabled?

    The ROM code protect is enabled at the first MCU reset after setting the ROM code protect function. If there is no reset after writing the program, the program can be verified. Contact the parallel programmer manufacturer for programmer specifications.

    Dec 26, 2017
  3. What is the reason of reset caused by the watchdog timer?

    The RAM is also initialized in the start-up file (ncrt0.a30). It might need several tens of milliseconds to initialize the RAM because of the low-speed on-chip oscillator clock divided by 8 is automatically selected as the CPU clock after reset. Therefore, please refresh the watchdog timer ...

    Dec 26, 2017
View All Results from Knowledge Base (10)
Support Communities

Support Communities

Get quick technical support online from Renesas Engineering Community technical staff.
Browse Articles

Knowledge Base

Browse our knowledge base for helpful articles, FAQs, and other useful resources.
Submit a Ticket

Submit a Ticket

Need to ask a technical question or share confidential information?

Resources