Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| Pkg. Type: | SOIC |
| Pkg. Code: | DCG8 |
| Lead Count (#): | 8 |
| Pkg. Dimensions (mm): | 4.9 x 3.9 x 1.5 |
| Pitch (mm): | 1.27 |
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
| Pkg. Type | SOIC |
| Lead Count (#) | 8 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Additive Phase Jitter Typ RMS (fs) | 250 |
| Additive Phase Jitter Typ RMS (ps) | 0.25 |
| Core Voltage (V) | 3.3 |
| Function | Buffer |
| Input Freq (MHz) | 1000 |
| Input Type | LVCMOS |
| Inputs (#) | 2 |
| Length (mm) | 4.9 |
| MOQ | 194 |
| Moisture Sensitivity Level (MSL) | 3 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 1000 |
| Output Skew (ps) | 100 |
| Output Type | LVPECL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 2 |
| Package Area (mm²) | 19.1 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 4.9 x 3.9 x 1.5 |
| Qty. per Carrier (#) | 97 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.5 |
| Width (mm) | 3.9 |
The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications.