Features
- Automatic fine interleave correction calibration
- Single supply 1.8V operation
- Clock duty cycle stabilizer
- 75f clock jitter
- 700MHz bandwidth
- Programmable built-in test patterns
- Multi-ADC support
- SPI programmable fine gain and offset control
- Support for multiple ADC synchronization
- Optimized output timing
- Nap and sleep modes
- 200µs sleep wake-up time
- Data output clock
- DDR LVDS-compatible or LVCMOS outputs
- Selectable clock divider
Description
The ISLA212P50 is a 12-bit, 500MSPS analog-to-digital converter designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. The ISLA212P50 is part of a pin-compatible portfolio of 12 to 16-bit A/Ds with maximum sample rates ranging from 130MSPS to 500MSPS. The device utilizes two time-interleaved 250MSPS unit ADCs to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. The proprietary Intersil Interleave Engine (I2E) performs automatic correction of offset, gain, and sample time mismatches between the unit ADCs to optimize performance. A serial peripheral interface (SPI) port allows for extensive configurability of the A/D. The SPI also controls the interleave correction circuitry, allowing the system to issue offline and continuous calibration commands as well as configure many dynamic parameters. Digital output data is presented in selectable LVDS or CMOS formats. The ISLA212P50 is available in a 72 Ld QFN package with an exposed paddle. Operating from a 1. 8V supply, performance is specified over the full industrial temperature range (-40°C to +85°C).
Parameters
| Attributes | Value |
|---|---|
| Resolution (bits) | 12 |
| Channels (#) | 1 |
| Conversion Rate (Max) (kSPS) | 500000 |
| Input BW (MHz) | 700 |
| Power Consumption (mW) | 823 |
| SFDR (dB) (dB) | 84 |
| SNR (dbFS) | 70.3 |
| Interface | LVDS/LVCMOS |
| Supply Voltage (V) | 1.8 - 1.8 |
| Digital Supply Voltage (V) | 1.8 - 1.8 |
| Differential NonLinearity LSB | 0.7 |
| Integral NonLinearity LSB | 1.8 |
| Input VIN ((VPP, differential)) | 2 |
| Qualification Level | Standard |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| QFN | 10.0 x 10.0 x 0.90 | 72 | 0.5 |
Applications
- Radar array processing
- Software defined radios
- Broadband communications
- High-performance data acquisition
- Communications test equipment
Renesas Boards & Kits
High Speed A/D Converter Evaluation Kits
Renesas offers two options for evaluating high-speed analog-to-digital converter (ADC) products with LVDS and/or LVCMOS outputs. A complete, turnkey evaluation platform is available, which includes data capture hardware and software to process and display acquired data. This system provides the... Read More
Knowledge Base
-
I want to evaluate ISLA212P. What eval boards do I need to order?
... ISLA214IR72EV1Z and configure for 12-bit operation. The ISLA214IR72EV1Z daughter card can be used to evaluate performance at sample rates of 40-250 MSPS. For sampling rate of 500 MSPS: you need KMB-001LEVALZ and ISLA214P50IR72EV1Z NOTE: No daughter card for ISLA212P50IRZ - order ISLA214P50IR72EV1Z and configure for 12-bit operation
-
Will the I2E retain its settings if the ADC is put into nap mode?
Question:Will the Intersil Interleave Engine (I2E) retain its settings if the ADC is put into nap mode? Answer: The following is applicable to the following ADCs: ISLA214P50, ISLA212P50, ISLA112P50 The I2E remains active in nap mode (if it is enabled), but because the ADC pipeline is not active, the ...
Support Communities
