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Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

9UM709 - Block Diagram
9UM709 - Pinout
3D illustration featuring top and bottom views of TSSOP IC chip package with 48 lead count.
9UM709 - Block Diagram
9UM709 - Pinout
3D illustration featuring top and bottom views of TSSOP IC chip package with 48 lead count.

9UM709BGLFT

Obsolete
Ultra Low Power Programmable Main Clock for VIA VX900 Chipset
9UM709B DatasheetLearn more about 9UM709

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PAG48
Lead Count (#):48
Pkg. Dimensions (mm):12.5 x 6.1 x 1.0
Pitch (mm):0.5

Environmental & Export Classifications

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

Product Attributes

Pkg. TypeTSSOP
Lead Count (#)48
Pb (Lead) FreeYes
Carrier TypeReel
App Jitter CompliancePCIe Gen1, PCIe Gen2
C-C Jitter Max P-P (ps)85
Chipset ManufacturerVia
Chipset NameVX900
Clock Spec.VX900
Core Voltage (V)1.5
Feedback InputNo
Input Freq (MHz)14.3182 - 14.3182
Input TypeCrystal
Inputs (#)1
Length (mm)12.5
MOQ2000
Moisture Sensitivity Level (MSL)1
Output Freq Range (MHz)14.318 - 300
Output Skew (ps)100
Output TypeHCSL
Output Voltage (V)0.7V, 1.5V, 3.3V
Outputs (#)17
Package Area (mm²)76.3
Pb Free Categorye3 Sn
Pitch (mm)0.5
Pkg. Dimensions (mm)12.5 x 6.1 x 1.0
Prog. ClockYes
Prog. InterfaceSMBus, I2C
Qty. per Carrier (#)0
Qty. per Reel (#)2000
Reel Size (in)13
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumYes
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)1
Width (mm)6.1

Description

Ultra low power main clock for VIA VX900 chipset

Learn more about 9UM709