Features
- True Dual-Ported memory cells which allow simultaneous access of the same memory location
- On-chip port arbitration logic
- BUSY output flag
- INT flag for port-to-port communication
- Fully asynchronous operation from either port
- Battery backup operation–2V data retention (LA only)
- TTL-compatible, single 5V ±10% power supply
- Available in 48-pin DIP, LCC and Ceramic Flatpack, 52-pin PLCC, and 64-pin STQFP and TQFP packages
- Industrial temperature range (–40C to +85C) is available
Description
The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.
Parameters
| Attributes | Value |
|---|---|
| Core Voltage (V) | 5 |
| Bus Width (bits) | 8 |
| Density (Kb) | 8 |
| Pkg. Code | PNG64, PPG64 |
| Interface | Async |
| I/O Type | 5.0 V TTL |
| Access Time (ns) | 20, 25 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Dual-Port |
| Organization | 1K x 8 |
| Function | Busy, Interrupt, Master |
Support Communities
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Need an Alternate for 7130LA25JGI8 (8Kb (1K x 8) Parallel 25ns 52-PLCC
Hi All, We are using 7130LA25JGI8 8Kb (1K x 8) Parallel 25ns 52-PLCC in our design & it seems it went obsolete back in 2025. Is it possible to have an alternate suggested? or could you please support a last time buy for this again? Awaiting your earliest response ...
Jan 19, 2026 -
deep sleep mode clarification
Dear Dialogue Support, I need to clarify a few points before burnning OTP. Background: we are going to use DA14580 + external flash (containing 2 copies of image, product header and persistence data). The device will remain in deep sleep until it is commissioned and connected. Once connected, it will use ...
Sep 16, 2016 -
RZV2M ISP integration issue
We have created a board based on the RZ/V2M processor. The only change we made compared to the RZV2M EVK is that we swapped the DDR data pins. We also made the necessary changes to the bootloader sources to accommodate these modifications. I am able to boot Linux ...
Oct 5, 2024
Support Communities
