Overview
Description
Features
- True Dual-Ported memory cells which allow simultaneous
- access of the same memory location
- Separate upper-byte and lower-byte control for multiplexed bus compatibility
- 70261 easily expands data bus width to 32 bits or more
- Busy and Interrupt Flags
- On-chip port arbitration logic
- Full on-chip hardware support of semaphore signaling between ports
- Fully asynchronous operation from either port
- TTL-compatible, single 5V (±10%) power supply
- Available in 100-pin TQFP package
- Industrial temperature range (-40OC to +85OC) is available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Product Options
Applied Filters:
Support
Support Communities
Support Communities
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Confirm Memory Detail of 70261L15PFG
Hi,As I will be taping out a chip recently, I want to confirm some details with your team regarding the SRAM Verilog behavioral model file you provided. verilog_model.zipThe product I purchased is 70261L15PFG (https://www.mouser.tw/ProductDetail/), and you previously informed me ...
Dec 9, 2024 -
Verilog model for the 70261 (16Kx16)
Dear Renesas Team, Could you provide me with the Verilog behavior model for 70261 SRAM?Thanks! Best Regards,Jason Shih [locked by: Michael Quirk at 15:19 (GMT 0) on 14 Aug 2024]
Jul 30, 2024 -
Problem using DA14681 ble sdk with custom OS
Hello, I am posting in this forum because I could not find any section dedicated to the DA14681. I am currently testing a DA14681 devkit and have been trying to integrate the ble code provided in the SDK with a different operating system than the default provided (FreeRTOS). I am ...
Jun 22, 2016