Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- Separate upper-byte and lower-byte control for multiplexed bus compatibility
- 7025 easily expands data bus width to 32 bits or more
- Interrupt Flag and On-chip port arbitration logic
- Full on-chip hardware support of semaphore signaling
- between ports
- Fully asynchronous operation from either port
- Battery backup operation—2V data retention
- TTL-compatible, single 5V (±10%) power supply
- Available in 84-pin PGA, Flatpack, PLCC, and 100-pin TQFP packages
- Industrial temperature range (–40C to +85C) is available
Description
The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.
Parameters
| Attributes | Value |
|---|---|
| Core Voltage (V) | 5 |
| Bus Width (bits) | 16 |
| Density (Kb) | 128 |
| Pkg. Code | GU84, PNG100 |
| Interface | Async |
| I/O Type | 5.0 V TTL |
| Access Time (ns) | 15, 20, 25, 35, 55 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Dual-Port |
| Organization | 8K x 16 |
| Function | Busy, Interrupt, Master, Semaphore, Slave |
Support Communities
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Confirm Memory Address Capacity 7025L20PFGI
Hi, I would like to confirm whether the memory size of 8Kx16 for the 7025L20PFGI means there are only 8,000 memory addresses, or does it go up to 8,192? If there are only 8,000 memory addresses, I have also found the 16Kx16 version online, which does not ...
Jun 21, 2024 -
Timing violation of 7025L20PFGI SRAM
... /1ps"? --- The following part is what I want to confirm about the other answers you replied to me last time --- LINKS: Timing violation of 7025L20PFGI SRAM - Memory Products - Memory Products - Renesas Engineering Community I think "taa" means "Access Time from Address" (as shown in the right picture), so I ...
Aug 20, 2024 -
Verilog model for the 7025L20PFGI or any other Dual-Port SRAM
Hi, Is there any Verilog model for the 7025L20PFGI or any other Dual-Port SRAM for simulation?In 'Documentation & Downloads', many other SRAMs do provide Verilog behavior models. However, the support files for Dual-Port SRAM are only available in IBIS or SPICE. Thanks! Best Regards,Jason Shih
Mar 15, 2024
Support Communities
