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Block diagram for the MIPI D-PHY Transmitter for DSI with FPD-Link IP using TSMC's 22nm ULP process.

AT22PMIP0002_FD10L4V10_R0

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MIPI D-PHY Transmitter for DSI with FPD-Link IP (TSMC 22nm ULP)
MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULPLearn more about AT22PMIP0002_FD10L4V10_R0

Package Information

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Environmental & Export Classifications

Pb (Lead) Free
Moisture Sensitivity Level (MSL)
ECCN (US)
HTS (US)

Product Attributes

ProtocolMIPI, FPD-Link
FunctionD-PHY, Transmitter
ProcessSoft macro & TSMC 22nm ULP
Data Rate (Mbps)MIPI: 1500, FPD-Link: 609
InterfaceLVDS, PPI, FPD-Link
Number of Channels4
Supply Voltage Range (V)Core: 1.0V, I/O: 1.8V
Data Rate RS-485/RS-232MIPI: 1500, FPD-Link: 609

Description

Renesas' MIPI® D-PHY™ and FPD-Link (LVDS) combinational transmitter is a useful 4-channel driver hard macro for Display Serial Interface (DSI), fabricated using TSMC's 22nm ULP (Ultra-Low Power) process.

Learn more about AT22PMIP0002_FD10L4V10_R0