Skip to main content
Renesas Electronics Corporation
MIPI D-PHY Receiver for CSI-2 IP (TSMC 22nm ULP)

Package Information

CAD Model:View CAD Model
Pkg. Type:
Pkg. Code:
Lead Count (#):
Pkg. Dimensions (mm):
Pitch (mm):

Environmental & Export Classifications

Pb (Lead) Free
Moisture Sensitivity Level (MSL)
ECCN (US)
HTS (US)

Product Attributes

ProtocolMIPI
FunctionD-PHY, Receiver
ProcessSoft macro & TSMC 22nm ULP
Data Rate (Mbps)1500
InterfaceCSI-2, PPI
Number of Channels4
Supply Voltage Range (V)Core: 0.9V, I/O: 1.8V
Data Rate RS-485/RS-2321500

Description

Renesas' MIPI® D-PHY™ Receiver IP is a 4 or 2 data lanes receiver hard macro for CSI-2® fabricated using TSMC's 22nm ULP (Ultra-Low Power) process.