Overview
Description
The IDT ADC demo board is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204B feature set.
Features
- SMA connector for clock and analog input signals
- On board ARRIA II GX FPGA for JESD204B data acquisition
- Single power supply (on-board regulators)
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Support
Support Communities
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