The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V / 2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2106 ideal for clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V / 2.5V power supply. The integrated bias voltage references enable easy interfacing of AC-coupled signals to the device inputs.

特長

  • Dual 1:6 low skew, low additive jitter LVDS fanout buffers
  • Matched AC characteristics across both channels
  • High isolation between channels
  • Low power consumption
  • Both differential CLKA, nCLKA and CLKB, nCLKB inputs accept
    LVDS, LVPECL and single-ended LVCMOS levels
  • Maximum input clock frequency: 2GHz
  • Output amplitudes: 350mV, 500mV (selectable)
  • Output bank skew: 10ps typical
  • Output skew: 20ps typical
  • Low additive phase jitter, RMS: < 45fs typical,
    (fREF = 156.25MHz, 12kHz - 20MHz)
  • Full 1.8V and 2.5V supply voltage mode
  • Lead-free (RoHS 6), 40-lead VFQFN packaging
  • -40°C to 85°C (Tc ≤ 105°C) operating temperature range
 

製品選択

発注型名 Part Status Type Lead Count (#) Temp. Grade Tape Pin 1 Quad Pb (Lead) Free Carrier Type 購入/サンプル
Active 40 I はい Tray
Availability
Active 40 I 2 はい Reel
Availability
Active 40 I 1 はい Reel
Availability
Active 48 I 2 はい Cut Tape
Availability
Active 48 I 2 はい Reel
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
8P34S2106 Datasheet データシート PDF 657 KB
アプリケーションノート、ホワイトペーパー
AN-846 Termination - LVDS アプリケーションノート PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers アプリケーションノート PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection アプリケーションノート PDF 495 KB
AN-840 Jitter Specifications for Timing Signals アプリケーションノート PDF 442 KB
AN-834 Hot-Swap Recommendations アプリケーションノート PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention アプリケーションノート PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels アプリケーションノート PDF 120 KB
AN-827 Application Relevance of Clock Jitter アプリケーションノート PDF 1.15 MB
AN-815 Understanding Jitter Units アプリケーションノート PDF 565 KB
AN-805 Recommended Ferrite Beads アプリケーションノート PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 製品変更通知 PDF 983 KB
その他資料
IDT Clock Distribution Overview (Japanese) English 概要 PDF 7.79 MB
RF Timing Family Product Overview 概要 PDF 464 KB
Timing Solutions Products Overview 概要 PDF 4.11 MB
IDT Products for Radio Applications (Japanese) English 製品概要 PDF 6.27 MB
8P34S21xx-series 1.8V Dual RF Clock / Data Fanout Buffers 製品概要 PDF 291 KB
IDT Clock Generation Overview (Japanese) English 概要 PDF 2.19 MB