Skip to main content
Renesas Electronics Corporation
USB 2.0 PHY for Single-Port Transceiver IP (TSMC 40nm LP)

Package Information

CAD Model:View CAD Model
Pkg. Type:
Pkg. Code:
Lead Count (#):
Pkg. Dimensions (mm):
Pitch (mm):

Environmental & Export Classifications

Pb (Lead) Free
Moisture Sensitivity Level (MSL)
ECCN (US)
HTS (US)

Product Attributes

ProtocolUSB 2.0
FunctionPHY, Transceiver
ProcessTSMC 40nm LP
Data Rate (Mbps)480, 12, 1.5
InterfaceUTMI+
Number of Channels1
Input Freq (MHz)48MHz, 24MHz, 20MHz, 12MHz
Supply Voltage Range (V)Core: 1.1V, I/O: 3.3V
Data Rate RS-485/RS-232High-Speed (480Mbps), Full-Speed (12Mbps), Low-Speed (1.5Mbps)
Input Freq (MHz)48 - 48, 24 - 24, 20 - 20, 12 - 12

Description

Renesas' USB 2.0 Transceiver IP is a useful analog single-port transceiver hard macro for UTMI+ (USB 2.0 Transceiver Macrocell Interface +) Level 3. Fabricated using TSMC's 40nm Low Power (LP) process, this macro can be configured to operate as a USB 2.0 peripheral or USB 2.0 host controller.