Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PAG64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 17.0 x 6.1 x 1.0 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Pkg. Type | TSSOP |
| Lead Count (#) | 64 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2 |
| C-C Jitter Max P-P (ps) | 85 |
| Chipset Manufacturer | Intel |
| Clock Spec. | CK505 Derivative |
| Core Voltage (V) | 3.3 |
| Feedback Input | No |
| Function | Clock Generator |
| Input Freq (MHz) | 14.318 - 14.318 |
| Input Type | Crystal |
| Inputs (#) | 1 |
| Length (mm) | 17 |
| MOQ | 112 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 9 |
| Output Freq Range (MHz) | 14.318 - 400 |
| Output Skew (ps) | 100 |
| Output Voltage (V) | 1.5V, 1.8V, 2.5V, 3.3V |
| Outputs (#) | 22 |
| Package Area (mm²) | 103.7 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 17.0 x 6.1 x 1.0 |
| Prog. Clock | Yes |
| Prog. Interface | SMBus |
| Published | No |
| Qty. per Carrier (#) | 28 |
| Qty. per Reel (#) | 0 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1 |
| Width (mm) | 6.1 |
Resources for 9LPRS501
Description
9LPRS501 follows Intel CK505 Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation Intel processors and Intel chipsets. 9LPRS501 is driven with a 14.318MHz crystal. It also provides a tight ppm accuracy output for Serial ATA and PCI-Express support.