View
View

Microcontrollers & Microprocessors

Overview

Optimal for HMI applications that require a wide section of connectivity, the S5D9 MCU Group delivers processing performance, supports an Ethernet with PTP controller, and offers up to 2 MB of flash memory and 640 KB of SRAM. It provides analog signal conditioning with Programmable Gain Amplifiers for analog processing, color graphics with a TFTLCD Controller, and a 2D Drawing Engine.

Synergy Software Package (SSP)

Commercial software worth over $100K which is available to developers using the Synergy Platform for no charge and with unlimited production license rights. The production-ready SSP is fully tested, maintained, and supported by Renesas.

Download SSP

S5D9 Block Diagram
S5D9 Block Diagram
  • 120MHz Arm® Cortex®-M4 CPU
  • Optimal for HMI applications that require a wide section of connectivity
  • Supports an Ethernet with PTP controller
  • Analog signal conditioning with Programmable Gain Amplifiers for analog processing
  • Color graphics with a TFTLCD Controller, and a 2D Drawing Engine
Vending Machine with Secure Cloud Connection
Air Quality Monitor (PM2.5) with Secure Cloud Connection
Drug Delivery with ISO 12207 Software
Simple Network Management Protocol Card Solution
Qeexo AutoML for Embedded Devices

Applications

  • Home Automation Control

Documentation

Title Type Date
S5D9 Microcontroller Group User's Manual
PDF24.12 MB日本語
Manual - Hardware
S5D9 Microcontroller Group Datasheet (R01DS0303EU0130)
PDF1.37 MB
Datasheet
GUIX™ Synergy Port Framework Module Guide
PDF1.06 MB日本語
Related Files:
Application Note
Capacitive Sensor Microcontrollers CTSU Capacitive Touch Introduction Guide
PDF2.33 MB日本語
Application Note
QE for Capacitive Touch 3D Gesture Recognition Application Development Guide
PDF4.53 MB日本語
Application Note
Capacitive Sensor Microcontrollers CTSU Capacitive Touch Electrode Design Guide Rev.2.00
PDF8.01 MB日本語, 简体中文
Application Note
USBX™ Host Class Mass Storage Module Guide
PDF313 KB
Related Files:
Application Note
How to use CUnit in e² studio (CC-RX)
PDF772 KB日本語
Application Note
How to use CUnit in e² studio (GCC for RX)
PDF998 KB日本語
Application Note
e² studio Creating and executing build CMake project
PDF1.11 MB日本語
Application Note
How to automate CUnit tests in e² studio and Jenkins
PDF2.26 MB日本語
Application Note
Creating a Custom Board Support Package for SSP v1.2.0 or Later - Application Note
PDF1.75 MB日本語
Application Note
Integrated Development Environment e² studio: How to use EGit in e² studio Rev.1.01
PDF1.79 MB日本語
Application Note
Renesas Synergy Using QE and SSP to Develop Capacitive Touch Applications
PDF1.36 MB日本語
Application Note
PK-S5D9 v1.0 Out-of-Box Demonstration Programming Guidelines - Application Project (R20AN0506EU0101)
PDF279 KB
Related Files:
Application Note
Synergy MQTT/TLS AWS Cloud Connectivity Solution - Application Project
PDF1.78 MB日本語
Related Files:
Application Note
Synergy MQTT/TLS Azure Cloud Connectivity Solution - Application Project
PDF1.04 MB日本語
Related Files:
Application Note
Synergy MQTT/TLS Google Cloud Connectivity Solution - Application Project
PDF1.32 MB日本語
Related Files:
Application Note
Mutual Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs
PDF1.15 MB日本語
Related Files:
Application Note
Self-Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs
PDF1.39 MB日本語
Related Files:
Application Note
Customizing a SSP Module
PDF548 KB日本語
Related Files:
Application Note
NetX™ DHCPv6 Server Module Guide
PDF326 KB
Related Files:
Application Note
NetX™ Port Ether Module Guide
PDF568 KB
Related Files:
Application Note
NetX™, NetX Duo™ DHCP Server Module Guide
PDF262 KB
Related Files:
Application Note
Wi-Fi Framework
PDF2.79 MB
Related Files:
Application Note
Tuning the Capacitive Touch Solution
PDF1.72 MB
Related Files:
Application Note
NetX™ and NetX Duo™ FTP Client Module Guide
PDF876 KB
Related Files:
Application Note
Synergy Device Identity Application
PDF709 KB日本語
Related Files:
Application Note
Renesas Synergy™ Platform Pin Configurator Usage
PDF2.27 MB日本語
Application Note
Getting Started with the Audio Player Application using SSP - Application Project
PDF1.04 MB日本語
Related Files:
Application Note
USBX™ Host Class CDC-ACM Module Guide - Application Project
PDF277 KB
Related Files:
Application Note
USBX™ Device Class HID Module Guide - Application Project
PDF284 KB日本語
Related Files:
Application Note
Cellular Framework - Application Project
PDF1.93 MB日本語
Related Files:
Application Note
USBX™ Device Class Mass Storage Module Guide - Application Project
PDF224 KB
Related Files:
Application Note
Getting Started with the Weather Panel Application - Application Project
PDF2.14 MB日本語
Related Files:
Application Note
Getting Started with NetX Duo™ Web Server - Application Project
PDF644 KB日本語
Related Files:
Application Note
Getting Started with NetX™ Web Server - Application Project
PDF586 KB
Related Files:
Application Note
Getting Started with the Thermostat Application for S7G2 and S5D9 - Application Project
PDF2.00 MB
Related Files:
Application Note
Secure Boot Manager - Application Note
PDF1.08 MB日本語
Related Files:
Application Note
USBX™ Host Class Hub Module Guide - Application Project
PDF250 KB
Related Files:
Application Note
USBX™ Device Class CDC-ACM Module Guide - Application Project
PDF456 KB
Related Files:
Application Note
Synergy Secure Data at Rest - Application Project
PDF1.23 MB日本語
Related Files:
Application Note
USBX™ Host Class Video Module Guide - Application Project
PDF306 KB
Related Files:
Application Note
Creating a Custom Board Support Package for SSP 1.1.z - Application Project
PDF439 KB
Related Files:
Application Note
Software Quality Summary for SSP v1.5.0 - Application Note
PDF772 KB日本語
Application Note
SSP Module Development Guide - Application Note
PDF736 KB日本語
Application Note
PK-S5D9 v1.0 Out-of-Box Demonstration Programming Guidelines - Application Project (R20AN0506EU0100)
PDF231 KB
Related Files:
Application Note
BLE Framework - Application Project
PDF1.73 MB日本語
Related Files:
Application Note
Power Profiles v2 (PPv2) Framework for PK-S5D9 - Application Project
PDF2.99 MB
Related Files:
Application Note
S3A7 to S5D5 MCU Group Migration Guide - Application Note
PDF555 KB日本語
Application Note
Software Development Best Practices Guide for SSP Users - Application Note
PDF750 KB
Application Note
S7G2 Group MCU to S5D9 Group MCU Migration Guide - Application Note
PDF861 KB日本語
Application Note
Renesas Synergy™ Platform Brochure
PDF3.08 MB
Brochure
IoT Demands New Approach to MCU-based Embedded Designs
PDF177 KB
Brochure
Renesas Synergy™ MCUs Build a Foundation for Groundbreaking Integrated Embedded Platform Development
PDF481 KB
Brochure
Renesas Synergy™ Platform Charts Revolutionary Path to Faster Microcontroller System Development for IoT and Embedded Products
PDF1.50 MB
Brochure
Renesas Synergy™ Software Package (SSP) Redefines Software Development for the IoT Market
PDF1021 KB
Brochure
BASICS OF THE RENESAS SYNERGY TM PLATFORM
PDF12.20 MB
Flyer
Semiconductor Reliability Handbook
PDF14.70 MB日本語
General Reliability Literature
Renesas Synergy Nomenclature
PDF466 KB
Guide
Security Key Management Tool V.1.03 User's Manual
PDF2.29 MB日本語, 简体中文
Manual - Development Tools
e2 studio v7.3 or Higher Getting Started Guide
PDF5.79 MB日本語
Manual - Development Tools
Semiconductor Package Mount Manual
PDF10.28 MB日本語, 简体中文
Other
Back-end factory and material change for RA(RA6M3)/SYNERGY(S5D9) 176pin-LQFP products (IMO-AB-23-0009)
PDF1.17 MB日本語
Product Change Notice
Notice of Change in Substrate Materials for TFLGA, LFBGA, and TFBGA Products(PC-COM-A001B/E)
PDF257 KB日本語
Product Change Notice
Assembly materials change for RA/SYNERGY family LQFP package products (IMO-AZ-22-0006-1)
PDF171 KB日本語
Product Change Notice
R7FS5D9XXX Reliability Report
PDF428 KB
Product Reliability Report
Renesas Synergy™ Platform QE for Capacitive Touch for e² studio Quick Start Guide
PDF2.49 MB日本語
Quick Start Guide
Synergy Enterprise Cloud Toolbox for PK-CLOUD1 - Quick Start Guide
PDF1.04 MB
Quick Start Guide
e² studio 2023-04 Release Note
PDF2.82 MB
Release Note
QE for Capacitive Touch V3.2.0 Release Note
PDF854 KB日本語
Release Note
e² studio 2023-01 Release Note
PDF3.02 MB
Release Note
QE for Capacitive Touch V3.1.0 Release Note
PDF214 KB日本語
Release Note
e² studio 2022-10 Release Note
PDF2.64 MB
Release Note
QE for Capacitive Touch V3.0.2 Release Note
PDF170 KB日本語
Release Note
QE for Capacitive Touch V3.0.1 Release Note
PDF161 KB日本語
Release Note
e² studio 2022-01 Release Note
PDF2.87 MB
Release Note
e² studio 2021-10 Release Note
PDF2.32 MB
Release Note
QE for Capacitive Touch V2.0.0 Release Note Rev.2.00
PDF161 KB日本語
Release Note
QE for Capacitive Touch[RA,RL78,Synergy] V1.4.1 Release Note
PDF146 KB日本語
Release Note
e² studio 2021-07 Release Note
PDF3.00 MB
Release Note
QE for Capacitive Touch[RA,RL78,Synergy] V1.4.0 Release Note
PDF172 KB日本語
Release Note
S5D5 MCU Group, S5D9 MCU Group, S7G2 MCU Group, correction of EXENB bit in the CSnCR register
PDF191 KB
Technical Update
GPT : Modified description for OADF and OBDF bits
PDF229 KB
Technical Update
S3 MCU Series, S5 MCU Series, S7 MCU Series, correction of Battery Backup Function
PDF111 KB
Technical Update
S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, enhancement of HOCO accuracy with FLL
PDF159 KB
Technical Update
S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, correction of SPI Data Control Register (SPDCR) bit
PDF107 KB
Technical Update
S5D9 MCU Group, correction of Pin lists
PDF227 KB
Technical Update
S5D9 MCU Group, Note on the number of ADC channels.
PDF604 KB
Technical Update
S128 MCU Group, S1JA MCU Group, S3A1 MCU Group, S3A3 MCU Group, S3A6 MCU Group, S3A7 MCU Group, S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, Note on ALeRASE command
PDF153 KB
Technical Update
S5D3 Group, S5D5 Group, S5D9 Group, VBATT minimum voltage level enhancement
PDF220 KB
Technical Update
S5D3 Group, S5D5 Group, S5D9 Group, adding LGA/BGA packages with operating temperature -40 to +105 °C support
PDF134 KB
Technical Update
S5D3, S5D5, S5D9 Errata for User's Manual: Hardware for I/O port
PDF195 KB
Technical Update
Errata for User's Manual: Hardware for HOCO (TN-SY-A0053A/E)
PDF116 KB
Technical Update
Errata for User's Manual: Hardware for HOCO (TN-SY-A0054A/E)
PDF110 KB
Technical Update
Errata for User's Manual regarding the IIC (TN-SYx-A0046A/E)
PDF652 KB
Technical Update
The restriction at switching a clock source (TN-SYx-A0037B/E)
PDF196 KB
Technical Update
Errata for User's Manual regarding the USB
PDF128 KB
Technical Update
Note on JPEG decoding
PDF282 KB
Technical Update
The restriction at switching a clock source (TN-SYx-A0037A/E)
PDF208 KB
Technical Update
Functional Limitation of the JPEG Interface Decompression Control
PDF261 KB
Technical Update
Limitations on programming the Option-Setting Memory for flash access applications
PDF133 KB
Technical Update
Revised information about the reserved bit of the SD_ERR_STS1 register in SDHI
PDF88 KB
Technical Update
Revised information for current version of the User's Manuals
PDF1.09 MB
Technical Update
Additional information to the Temperature Sensor (TSN) of S5D9 and S5D5
PDF68 KB
Technical Update
Correction to the description that was added for the Security MPU Program Counter Start Address Register (SECMPUPCSn) (TN-SYx-A017B/E)
PDF39 KB
Technical Update
Unexpected GLCDC interrupt generated in S7G2 and S5D9 after the GLCDC starts
PDF111 KB
Technical Update
Additional Description related to the store buffer of SRAM
PDF61 KB
Technical Update
Additional information for security MPU use in MPU chapter, S5D9 User's Manual Rev.1.00
PDF90 KB
Technical Update
[Notes] Solution Toolkit QE for Display Development Assistance Tool for Display Applications
PDF126 KB日本語
Tool News - Note
[Notes] Solution Toolkit QE for Capacitive Touch Development Assistance Tool for Capacitive Touch Sensors
PDF47 KB日本語
Tool News - Note
[Notification] Flash Programmer Survey Invitation
PDF29 KB日本語
Tool News - Notification
[Notification] Acceptance for Final Orders for PG-FP5 Flash Memory Programmer, Introducing PG-FP6 as Successor
PDF87 KB日本語
Tool News - Notification
[Upgrade to Version] e² studio Integrated Development Environment 2023-04
PDF182 KB日本語
Tool News - Release
[Upgrade to Revision] Solution Toolkit, Development Assistance Tool for Capacitive Touch Sensors, QE for Capacitive Touch V3.2.0
PDF262 KB日本語
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2023-01
PDF129 KB日本語
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-10
PDF154 KB日本語
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-07
PDF127 KB日本語
Tool News - Release
[Upgrade to Revision] Solution Toolkit QE for Capacitive Touch V3.1.0 Development Assistance Tool for Capacitive Touch Sensors
PDF186 KB日本語
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-04
PDF267 KB日本語
Tool News - Release
[Upgrade to Version] Solution Toolkit QE for Capacitive Touch V3.0.1 Development Assistance Tool for Capacitive Touch Sensors
PDF65 KB日本語
Tool News - Release
[Upgrade to revision] Programming GUI for PG-FP6 Flash Memory Programmer (FP6 Terminal) V1.05.01
PDF57 KB日本語
Tool News - Release
[Upgrade to revision] Renesas Flash Programmer V3.08.01
PDF81 KB日本語
Tool News - Release
[Upgraded to version] e² studio 2021-01
PDF159 KB日本語
Tool News - Release
[Upgrade to revision] Programming GUI for PG-FP6 Flash Memory Programmer (FP6 Terminal) V1.05.00
PDF72 KB日本語
Tool News - Release
[Upgrade to revision] Renesas Flash Programmer V3.08.00
PDF83 KB日本語
Tool News - Release
[Upgraded to version] e² studio 2020-10
PDF160 KB日本語
Tool News - Release

Design & Development

Software & Tools

Renesas Synergy™ Software Package (SSP)Tightly integrated, optimized, and qualified suite of software with a commercial RTOS that scales with end-product complexity and simplifies complex system-level services.Downloads:
Renesas Synergy™ Platform QE for Capacitive Touch for e² studio Quick Start Guide
 Software Package Renesas
QE for Capacitive Touch: Development Assistance Tool for Capacitive Touch SensorsIn developing embedded system using the capacitive touch sensor of RA family and RX family MCUs, you can easily setup initial configurations of the touch interface as well as process the tuning of sensors, and reduce development time. [Plugin for Renesas IDE "e2 studio"] Downloads:
Capacitive Sensor Microcontrollers CTSU Capacitive Touch Electrode Design Guide Rev.2.00Renesas Synergy Using QE and SSP to Develop Capacitive Touch ApplicationsRenesas Synergy™ Platform QE for Capacitive Touch for e² studio Quick Start Guide
 Solution Toolkit Renesas
Security Key Management ToolKey wrapping tool for key management systems using Renesas security IP. Enables secure installation and update of user application and device lifecycle management (DLM) keys. Solution Toolkit Renesas

Sample Code

Title Type Date
GUIX™ Synergy Port Framework Module Guide Rev.1.04 - Sample Code
ZIP2.72 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
USBX™ Host Class Mass Storage Module Guide Rev.1.05 - Sample Code
ZIP2.14 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
PK-S5D9 v1.0 Out-of-Box Demonstration Programming Guidelines
ZIP8.89 MB
Related Files:
Compiler: ARMCC, GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy MQTT/TLS Google Cloud Connectivity Solution - Application Project (r11an0335eu0105) Rev.1.05 - Sample Code
ZIP3.32 MB
Related Files:
Compiler: ARMCC, ICCARM
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy MQTT/TLS AWS Cloud Connectivity Solution - Application Project Rev.1.05 - Sample Code
ZIP3.70 MB
Related Files:
Compiler: ARMCC, ICCARM
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy MQTT/TLS Azure Cloud Connectivity Solution - Application Project (r11an0337eu0105) Rev.1.05 - Sample Code
ZIP3.18 MB
Related Files:
Compiler: ARMCC, ICCARM
IDE: e2 studio, IAR EW for Synergy
Sample Code
Mutual Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs Rev.1.06 - Sample Code
ZIP3.29 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Self-Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs Rev.1.06 - Sample Code
ZIP3.60 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Customizing a SSP Module Rev.1.14 - Sample Code
ZIP2.24 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
NetX™ DHCPv6 Server Module Guide Rev.1.02 - Sample Code
ZIP2.00 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
NetX™ Port Ether Module Guide Rev.1.11 - Sample Code
ZIP2.27 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
NetX™, NetX Duo™ DHCP Server Module Guide Rev.1.04 - Sample Code
ZIP2.00 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Wi-Fi Framework Rev.1.04 - Sample Code
ZIP4.22 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Wi-Fi Framework on PE-HMI1 Rev.1.05 - Sample Code
ZIP3.83 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Tuning the Capacitive Touch Solution Rev.1.08 - Sample Code
ZIP4.53 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
NetX™ and NetX Duo™ FTP Client Module Guide Rev.1.02 - Sample Code
ZIP2.49 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy Device Identity Application Rev.1.02 - Sample Code
ZIP125.86 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
UART HAL Module Guide Rev.1.03 - Sample Code
ZIP3.02 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Getting Started with the Audio Player Application using SSP - Application Project Rev.1.03 - Sample Code
ZIP9.50 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
USBX™ Host Class CDC-ACM Module Guide - Application Project Rev.1.02 - Sample Code
ZIP2.18 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
USBX™ Device Class HID Module Guide - Application Project Rev.1.04 - Sample Code
ZIP2.25 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Cellular Framework - Application Project Rev.1.05 - Sample Code
ZIP3.64 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy MQTT/TLS Azure Cloud Connectivity Solution - Application Project (r11an0337eu0102) Rev.1.02 - Sample Code
ZIP13.35 MB
Compiler: ARMCC, ICCARM
IDE: e2 studio, IAR EW for Synergy
Sample Code
USBX™ Device Class Mass Storage Module Guide - Application Project (r11an0104eu0104) Rev.1.04 - Sample Code
ZIP2.22 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio
Sample Code
Getting Started with the Weather Panel Application - Application Project Rev.2.10 - Sample Code
ZIP16.28 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Getting Started with the Thermostat Application for S7G2 and S5D9 - Application Project Rev.1.06 - Sample Code
ZIP13.86 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Getting Started with NetX Duo™ Web Server - Application Project Rev.1.08 - Sample Code
ZIP3.27 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Getting Started with NetX™ Web Server - Application Project Rev.1.10 - Sample Code
ZIP2.46 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Secure Boot Manager - Application Note Rev.1.02 - Sample Code
ZIP119.84 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio
Sample Code
USBX™ Host Class Hub Module Guide - Application Project Rev.1.01 - Sample Code
ZIP5.37 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
USBX™ Device Class CDC-ACM Module Guide - Application Project Rev.1.01 - Sample Code
ZIP4.86 MB
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Synergy Secure Data at Rest - Application Project Rev.1.00 - Sample Code
ZIP89.36 MB
Related Files:
Compiler: ARMCC
IDE: e2 studio
Sample Code
USBX™ Host Class Video Module Guide - Application Project Rev.1.00 - Sample Code
ZIP4.80 MB
Related Files:
Compiler: GNUARM-NONE, ICCARM
IDE: e2 studio, IAR EW for Synergy
Sample Code
Creating a Custom Board Support Package for SSP 1.1.z - Application Project Rev.1.06 - Sample Code
ZIP8.43 MB
Related Files:
IDE: e2 studio
Sample Code
PK-S5D9 v1.0 Out-of-Box Demonstration Programming Guidelines - Application Project - Sample Code (r20an0506eu0100)
ZIP8.24 MB日本語
Related Files:
Compiler: ARMCC, GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
BLE Framework - Application Project (r30an0309eu0104) Rev.1.04 - Sample Code
ZIP5.04 MB日本語
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code
Power Profiles v2 (PPv2) Framework for PK-S5D9 - Application Project - Sample Code (r20an0474eu0103)
ZIP4.75 MB日本語
Related Files:
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
Sample Code

Boards & Kits

resembled AE-Cloud2 kit

RTK7AECLD2S00001BU

Development
Order Now

AE-CLOUD2 - Global LTE IoT Connectivity Example

LTE IoT includes the very latest cellular technologies Cat-M1 and Cat-NB1 (NB-IoT), both are ideal for connecting IoT devices and sensors to 4G LTE cellular networks...

Featured Documents:
Application Example for Cloud Connectivity (AE-CLOUD2) User's Manual
PK-S5D9 Board

RTK7PKS5D9S00001BU

Development
Order Now

PK-S5D9 Promotion Kit

Experience the Synergy™ Platform and the Synergy S5D9 microcontroller (MCU) Group, including high-speed connectivity and rich user interfaces, using Synergy software...

Featured Documents:
Promotion Kit S5D9 (PK-S5D9) Quick Start Guide
AE-CLOUD1 Boards

YSAECLOUD1

Development
Order Now

AE-CLOUD1 - Cloud Connectivity Example

AE-CLOUD1 enables rapid evaluation, prototyping and development of cloud connected applications. It features the S5D9 microcontroller (MCU) Group, the superset of the...

Featured Documents:
Application Example for Cloud Connectivity (AE-CLOUD1) User's Manual

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models

Models

Title Type Date
Renesas Synergy™ S5D9 IBIS Rev.1.10 (synergy-s5d9-ibis-rev110.zip)
ZIP2.31 MB日本語
Model - IBIS

Product Options

    Processing table
    Part Number
    Program Memory (KB)
    Data Flash (KB)
    SRAM
    Lead Count (#)
    Pkg. Type
    PLP
    Operating Voltage Range (V)
    Operating Freq (Max) (MHz)
    DAC
    I/O Ports
    CAN (ch)
    Safety
    Security & Encryption
    Family Name
    DMA
    Ethernet
    Buy / Sample
    R7FS5D97C3A01CFP#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 1024 64 640 KB 100 LQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97C3A01CFB#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 1024 64 640 KB 144 LFQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97C2A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 1024 64 640 KB 145 LGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97E3A01CFP#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 2048 64 640 KB 100 LQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97E3A01CFB#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 2048 64 640 KB 144 LFQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97E2A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 2048 64 640 KB 145 LGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97E3A01CFC#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 2048 64 640 KB 176 LQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97E2A01CBG#AC0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 2048 64 640 KB 176 BGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97C2A01CBG#AC0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 1024 64 640 KB 176 BGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97C3A01CFC#AA0
    play_circleActive
    memory
    view_in_ar
    Samples Available
    		 1024 64 640 KB 176 LQFP 2032 Jun 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No Get Samples,
    R7FS5D97C3A01CFP#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 100 LQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97C3A01CFB#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 144 LFQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97E3A01CFB#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 144 LFQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97E3A01CFC#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 176 LQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97E3A01CFP#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 100 LQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97C3A01CFC#BA0
    play_circleActive
    memory
    view_in_ar
    		640 KB 176 LQFP 2036 Mar 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D97C3A01CBG#AC0
    play_circleActive
    memory
    view_in_ar
    		1024 64 640 KB 176 BGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D97C3A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    		1024 64 640 KB 145 LGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D97E3A01CBG#AC0
    play_circleActive
    memory
    view_in_ar
    		2048 64 640 KB 176 BGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 133 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D97E3A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    		2048 64 640 KB 145 LGA 2033 Oct 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    Parametric Table tips

    Tips for Using This Parametric Table:

    • Hide Filters button in header: Collapse or expands filters
    • Column sort buttons in header: Sort Column alphabetically / numerically descending or ascending
    • Reset button in header: Reset all filters to the page default
    • Full Screen button in header: Expand the table to full screen view (user must close out of full screen before they can interact with rest of page)
    • Export button in header: Export the filtered results of the table to an Excel document
    • Filter parts search bar in header: Type to filter table results by part number
    • Hide column button in column headers: Select to hide columns in table
    • AND / OR toggle switches in header: Toggles the logic of this particular filter to be “AND” or “OR” logic for filtering results
    • Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
    • Document icon next to product name in row: View the featured document for this product
    • Chip icon next to the right of the document icon in row: View the block diagram for this product
    • Cart icon to the right of the chip icon: Indicates that samples are available for this product

    Support

    Contact Technical Support
    Get Samples
    Renesas Synergy™ Support
    Renesas Synergy™ FAQs
    Synergy Forum
    MCU / MPU Selection Tool
    Contact a Sales Representative

    Resources

    Renesas Synergy™ Support Page