The R1RW0416D is a 4-Mbit High-Speed static RAM organized 256-kword × 16-bit. It has realized High-Speed access time by employing CMOS process (6-transistor memory cell) and High-Speed circuit designing technology. It is most appropriate for the application which requires High-Speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. Especially, LVersion and S-Version are low power consumption and it is the best for the battery backup system. The package prepares 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density surface mounting.

Features

  • Single 3.3 V supply: 3.3 V ± 0.3 V
  • Access time: 10 ns / 12 ns (max)
  • Completely static memory No clock or timing strobe required
  • Equal access and cycle times
  • Directly TTL compatible All inputs and outputs
  • Operating current: 145 / 130mA (max)
  • TTL standby current: 40 mA (max)
  • CMOS standby current : 5 mA (max) : 0.8 mA (max) (L-version) : 0.5 mA (max) (S-version)
  • Data retention current : 0.4 mA (max) (L-version) :0.2 mA (max) (S-version)
  • Data retention voltage: 2.0 V (min) (L-version , S-version)
  • Center VCC and VSS type pin out

Product Options

Orderable Part ID Part Status Pkg. Type Carrier Type Buy Sample
Active SOJ Tube
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
R1RW0416D Series Datasheet 日本語 Datasheet PDF 563 KB
R1RW0416D Series Datasheet PDF 162 KB
PCNs & PDNs
Unification of a JEDEC tray and a embossed carrier tape for LQFP package (Additional Information & Correction) 日本語 Product Change Notice PDF 4.86 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package 日本語 Product Change Notice PDF 3.74 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package 日本語 Product Change Notice PDF 1.46 MB
Other
Renesas Semiconductor Lead-Free Packages Brochure PDF 1.32 MB