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5P49V5901

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VersaClock 5 Low Power Programmable Clock Generator

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NOTICE - The following device(s) are recommended alternatives:
5P49V6965 - VersaClock 6E Programmable Clock Generator
Pin-pin compatible with additional functionality and design margin

Features

  • 4 differential outputs LVPECL, LVDS, HCSL - or 8 LVCMOS outputs
  • In-system programmable with 4 independent output frequencies
  • Up to 350MHz input/output frequencies
  • Also supports crystal input
  • Stores 4 different configurations in OTP non-volatile memory
  • < 100mW core power (at 3.3V)
  • < 0.7ps RMS phase jitter (typ.)
  • Meets PCIe® Gen 1/2/3, USB 3.0, 1/10 GbE clock requirements
  • 1.8V/2.5V/V3.3V core and output voltages
  • 4mm x 4mm 24-lead VFQFPN
  • -40 °C to +85 °C operating temperature range
  • Supported by the Timing Commander™ software tool
Find Other Products in Programmable Clocks
VersaClock5 Functional Block Diagram 5P49V5901
VersaClock5 Pin Diagram 5P49V5901
VersaClock5 Functional Block Diagram 5P49V5901
VersaClock5 Pin Diagram 5P49V5901

Description

The 5P49V5901 is a low-power programmable clock generator with best-in-class jitter performance and design flexibility with universal outputs capable of generating any output frequency. The 5P49V5901 is intended for high-performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using the I2C interface. This is Renesas' fifth generation of programmable clock technology (VersaClock® 5). The frequencies are generated from a single reference clock or crystal input. A glitchless manual switchover function allows one of the redundant clock inputs to be selected during normal operation.

Two select pins allow up to four different configurations to be programmed and accessible using processor GPIOs or bootstrapping. The different selections may be used for different operating modes (full function, partial function, and partial power-down), regional standards (US, Japan, Europe), or system production margin testing. The device may be configured to use one of two I2C addresses to allow multiple devices to be used in a system.

Parameters

Attributes Value
App Jitter Compliance PCIe Gen1, PCIe Gen2, PCIe Gen3
Outputs (#) 5
Output Type LVCMOS, LVPECL, HCSL, LVDS
Output Freq Range (MHz) 1 - 350
Input Freq (MHz) 1 - 350
Inputs (#) 2
Input Type Crystal, LVCMOS, LVPECL, LVDS, HCSL
Output Banks (#) 4
Core Voltage (V) 1.8, 2.5, 3.3
Output Voltage (V) 1.8, 2.5, 3.3
Phase Jitter Typ RMS (ps) 0.7
Prog. Interface I2C, OTP
Spread Spectrum Yes

Package Options

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
VFQFPN 4.0 x 4.0 x 0.9 24 0.5

Applications

  • Ethernet switches/routers
  • PCI Express 1.0/2.0/3.0
  • Broadcast video/audio timing
  • Multi-function printers
  • Processor and FPGA clocking
  • Any-frequency clock conversion
  • MSAN/DSLAM/PON
  • Fiber Channel, SAN
  • Telecom line cards
  • 1 GbE and 10 GbE

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VersaClock® 5 is a low-power programmable clock generator with best-in-class jitter performance with less than 0.7psec RMS phase jitter from 12KHz to 20MHz. The highly integrated device consolidates four differential or eight single-ended clock generators and can store up to four different configuration settings, helping to minimize board space and bill-of-materials. The high-performance clock generator operates at less than 100mW core power (50 percent lower than competing devices), helping to ease system thermal constraints and reduce operating power expenses. 
 
VersaClock 5 can take a crystal or a clock input. It has 4 fractional output dividers which allow the programming of 4 independent frequencies up to 350MHz. The four universal output pairs are independently configurable as HCSL, LVPECL, LVDS, or dual LVCMOS outputs. It also features a reference clock output. The fractional output dividers driving each output pair are easily programmed via I2C while the device is operating in the system, lending itself to system tuning and margin testing. Unlimited in-system reprogramming is possible via I2C, whereas four banks of one-time programmable non-volatile memory provide flexibility for multi-project inventory consolidation or design changes in field or production units. Upon request, devices may be factory-programmed to the customer's desired configuration.
 
Presented by Baljit Chandhoke, Product Marketing Manager at Integrated Device Technology, Inc. 
 
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