The 9DBU0641 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The device has 6 output enables for clock management and 3 selectable SMBus addresses.
Features
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Direct connection to 100 ohm transmission lines; saves 24 resistors compared to standard PCIe devices
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47 mW typical power consumption in PLL mode; minimal power consumption
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Outputs can optionally be supplied from any voltage between 1.05 and 1.5 V; maximum power savings
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OE# pins; support DIF power management
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HCSL-compatible differential input; can be driven by common clock sources
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Spread spectrum tolerant; allows reduction of EMI
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LP-HCSL differential clock outputs; reduced power and board space
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Programmable slew rate for each output; allows tuning for various line lengths
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Programmable output amplitude; allows tuning for various application environments
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Pin/software selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
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Outputs blocked until PLL is locked; clean system start-up
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Configuration can be accomplished with strapping pins; SMBus interface not required for device control
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3.3 V tolerant SMBus interface works with legacy controllers
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Space-saving 5x5 mm 40-pin VFQFPN; minimal board space
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3 selectable SMBus addresses; multiple devices can easily share an SMBus segment