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6-output 1.5V PCIe Zero-Delay/Fanout Clock Buffer

Package Information

Lead Count (#) 40
Pkg. Code NDG40
Pitch (mm) 0.4
Pkg. Type VFQFPN
Pkg. Dimensions (mm) 5.0 x 5.0 x 0.9

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) NLR
HTS (US) 8542390001

Product Attributes

Lead Count (#) 40
Carrier Type Reel
Moisture Sensitivity Level (MSL) 3
Qty. per Reel (#) 2500
Qty. per Carrier (#) 0
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range 0 to 70°C
Country of Assembly Taiwan
Country of Wafer Fabrication Taiwan
Accepts Spread Spec Input Yes
Additive Phase Jitter Typ RMS (fs) 313
Additive Phase Jitter Typ RMS (ps) 0.31
Advanced Features Multiple SMBus addresses
App Jitter Compliance PCIe Gen1, PCIe Gen2, PCIe Gen3
Architecture Common, SRNS
C-C Jitter Max P-P (ps) 50
Core Voltage (V) 1.5
Diff. Input Signaling HCSL
Diff. Inputs 1
Diff. Output Signaling LP-HCSL
Diff. Outputs 6
Feedback Input No
Function Zero Delay Buffer
Input Freq (MHz) 30 - 175
Input Type HCSL
Length (mm) 5
MOQ 2500
NXP Processor Function SerDes Clock
Output Banks (#) 1
Output Freq Range (MHz) 1 - 167
Output Impedance 100
Output Skew (ps) 50
Output Type LP-HCSL
Output Voltage (V) 0.8
Outputs (#) 6
PLL Yes
Package Area (mm²) 25.0
Pitch (mm) 0.4
Pkg. Dimensions (mm) 5.0 x 5.0 x 0.9
Pkg. Type VFQFPN
Power Consumption Typ (mW) 47
Prog. Clock No
Reel Size (in) 13
Reference Output No
Spread Spectrum Yes
Supply Voltage (V) 1.05 - 1.5, 1.5 - 1.5
Tape & Reel Yes
Thickness (mm) 0.9
Width (mm) 5

Description

The 9DBU0641 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. It has integrated output terminations providing Zo=100 ohms for direct connection to 100 ohm transmission lines. The device has 6 output enables for clock management and 3 selectable SMBus addresses.