概要

The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.
71124 - Block Diagram
71124 - Block Diagram
  • JEDEC revolutionary pinout (center power/GND) for reduced noise.
  • Equal access and cycle times – Commercial and Industrial: 12/15/20ns
  • One Chip Select plus one Output Enable pin
  • Bidirectional inputs and outputs directly TTL-compatible
  • Low power consumption via chip deselect
  • Available in a 32-pin 400 mil Plastic SOJ packages

ドキュメント

= ピックアップ
分類 タイトル 日時
データシート
71124 Data Sheet
PDF 87 KB
ガイド
SRAM出荷ラベルとマーキングの見方
PDF 292 KB 英語
ガイド
SRAM製品発注型名の見方
PDF 568 KB 英語
EOL通知
PLC# : 230007 End-of-Life (EOL) Process on Select Part Numbers
PDF 1.17 MB
ガイド
SRAMはんだ付け・実装条件
PDF 1.31 MB 英語
5 items

設計・開発

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Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    71124S12YG
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Tube
    71124S12YG8
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Reel
    71124S15YG
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Tube
    71124S15YG8
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Reel
    71124S15YGI
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 I Yes Tube
    71124S15YGI8
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 I Yes Reel
    71124S20YG
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Tube
    71124S20YG8
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 C Yes Reel
    71124S20YGI
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 I Yes Tube
    71124S20YGI8
    circle廃止品
    memory
    view_in_ar
    		SOJ 32 I Yes Reel
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