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Features

  • JEDEC revolutionary pinout (center power/GND) for reduced noise.
  • Equal access and cycle times – Commercial and Industrial: 12/15/20ns
  • One Chip Select plus one Output Enable pin
  • Bidirectional inputs and outputs directly TTL-compatible
  • Low power consumption via chip deselect
  • Available in a 32-pin 400 mil Plastic SOJ packages

Description

The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.
Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
71124S12YGObsoleteN/AOut of StockSOJ32#CYesTube
71124S12YG8ObsoleteN/AOut of StockSOJ32#CYesReel
71124S15YGObsoleteN/AOut of StockSOJ32#CYesTube
71124S15YG8ObsoleteN/AOut of StockSOJ32#CYesReel
71124S15YGIObsoleteN/AIn StockSOJ32#IYesTube
71124S15YGI8ObsoleteN/AOut of StockSOJ32#IYesReel
71124S20YGObsoleteN/AOut of StockSOJ32#CYesTube
71124S20YG8ObsoleteN/AOut of StockSOJ32#CYesReel
71124S20YGIObsoleteN/AOut of StockSOJ32#IYesTube
71124S20YGI8ObsoleteN/AOut of StockSOJ32#IYesReel

Support Communities

  1. No Response to SMP Pairing Request

    I am using the DA14583 with an external host (TI DSP). The prox_reporter_ext_spi example has been built and loaded in the 14583 flash. Communication between the TI DSP and the DA14583 seem to be working correctly as I am getting the expected BLE messages at startup (GAPM ...

    Sep 14, 2016
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