概要
説明
The 524S is a low skew, single input to four output, LVCMOS clock buffer. The 524S has best in class additive phase Jitter of sub 50 fsec.
特長
- Low additive phase jitter RMS: 50fs
- Extremely low skew outputs (50ps)
- Low cost clock buffer
- Packaged in 8-SOIC and 8-DFN, Pb-free
- ICLK is PDT and may be driven before VDD is applied
- Direct-coupled signal path suitable for 1pps clocks
- Input / Output clock frequency up to 200MHz
- Non-inverting output clock
- Ideal for networking clocks
- Operating voltages: 1.8V to 3.3V
- Advanced, low power CMOS process
- Extended temperature range (-40°C to +105°C)
製品比較
アプリケーション
ドキュメント
= ピックアップ
ログイン後、ご登録が可能となります。
|
|
|
|
|---|---|---|
| 分類 | タイトル | 日時 |
| データシート | PDF 267 KB | |
| アプリケーションノート | PDF 187 KB | |
| 概要 | PDF 217 KB | |
| 製品変更通知 | PDF 268 KB | |
| 製品変更通知 | PDF 611 KB | |
| 製品変更通知 | PDF 611 KB | |
| アプリケーションノート | PDF 495 KB | |
| アプリケーションノート | PDF 442 KB | |
| アプリケーションノート | PDF 565 KB | |
9 items
|
||
設計・開発
モデル
ECADモデル
[製品選択]テーブル内の製品名をクリックするとSamacSysが提供する回路図シンボル、PCBフットプリント、3D CADモデルがご確認いただけます。 お探しのシンボルやモデルが見つからない場合、Webサイトから直接リクエストできます。
Processing table
Tips for Using This Parametric Table:
- Hide Filters button in header: Collapse or expands filters
- Column sort buttons in header: Sort Column alphabetically / numerically descending or ascending
- Reset button in header: Reset all filters to the page default
- Full Screen button in header: Expand the table to full screen view (user must close out of full screen before they can interact with rest of page)
- Export button in header: Export the filtered results of the table to an Excel document
- Filter parts search bar in header: Type to filter table results by part number
- Hide column button in column headers: Select to hide columns in table
- AND / OR toggle switches in header: Toggles the logic of this particular filter to be “AND” or “OR” logic for filtering results
- Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
- Document icon next to product name in row: View the featured document for this product
- Chip icon next to the right of the document icon in row: View the block diagram for this product
- Cart icon to the right of the chip icon: Indicates that samples are available for this product
ビデオ&トレーニング
Low-jitter LVCMOS Fanout Clock Buffers by IDT
This video overviews the LVCMOS Fanout Buffers, showcasing their best-in-class performance with extremely low phase jitter, minimal output skew, and low power consumption, along with other competitive features.
Video List