特長
- Standards compliant with DisplayPort v1.1a, HDCP v1.3 and EDID v1.4
- Main link data bit-rates of 2.7Gbps(HBR) per lane and 1.62Gbps (LBR) per lane form an upstream source device
- Supports 1/2/4 lanes of main link with the source
- Dedicated I2C slave for main processor to access the VPP1101A or function as I2C master to access peripheral devices
- Output resolution monitor panel: up to 2560x2048@50Hz reduced blanking, QSXGA
- Output resolution TV Panel: up to full HD 1920x1080p@120Hz
- Input up to 36bit per pixel at 1080p@120Hz
- Digital audio interface supports one I2S output for connection to external low cost stereo audio DAC
- Built-in OTP for storage of HDCP key data
- Available in both QFP and QFN packages
Obsolete Part
説明
The VPP1101A is a VESA DisplayPort v1.1a-compliant receiver. It supports 1/2/4 main lanes, one bi-directional aux channel and single/dual bus outputs of up to 2560x2048@50Hz reduced-blanking mode, QSXGA, digital video data with 6/8/10-bit per color. The output of VPP1101 takes LVTTL format to downstream display devices.
