特長
- Wide pixel clock range support: 8 to 135MHz
- Extended operating temperature of -20 to +85C
- On chip PLL requires no external components
- Supports up to SXGA resolution
- Power down mode
- On chip PLL requires no external components
- Compatible with TIA/EIA-644 LVDS standards
- Single 3.3V supply
- 64-pin TQFP package
Obsolete Part
説明
The V103A is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA resolutions and can be sued in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over low cost, low bus width cable up to several meters in length.
