概要
説明
The μ PC835 is the higher version of μPC832 and 4062, the J-FET input operational amplifiers, in stability and accuracy. The μ PC835 is a J-FET input dual operational amplifier which realizes both low power consumption and high stability, by adopting a High-Speed PNP transistor of fT = 300 MHz on its output stage. In addition, despite its J-FET input, the μ PC835 realizes low offset voltage characteristics that eclipses conventional general operational amplifiers, by using a resistance trimming system, the proven method for our high accuracy operational amplifier and high accuracy reference voltage. The μ PC835 is ideal for use in measurement instruments and control instruments, which especially requires the stability during capacitive load connections.
特長
- Input offset voltage: ±3 mV MAX.
- Slew rate: 5.5 V/μ s TYP.
- Unity gain frequency: 2.8 MHz TYP.
- Low power: ICC ≤ 2.2 mA MAX. (Reduces circuit currents while maintaining relatively high slew rate and bandwidth)
- High stability is secured to capacitive loads (4000 pF, AV = +1)
- Internal frequency compensation
- Small package The whole size of the package is downsized by 30 to 40% compared with a standard SOP contour, by using a TSSOP (3 x 3 mm² body) package
製品比較
アプリケーション
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| 分類 | タイトル | 日時 |
| データシート | PDF 498 KB English | |
| カタログ | PDF 5.67 MB English | |
| 製品別信頼性資料 | PDF 152 KB | |
| その他資料 | PDF 450 KB | |
| その他資料 | PDF 610 KB | |
| その他資料 | PDF 451 KB | |
| アプリケーションノート | PDF 447 KB | |
| アプリケーションノート | PDF 354 KB | |
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