特長
- Generates T1, E1, OC-3 and other common telecom clock frequencies from an 8kHz frame clock
- Configurable jitter attenuation characteristics, excellent for use as a Stratum source de-jitter circuit
- 2:1 Input MUX for input reference clocks
- VCXO-based clock generation offers very low jitter and phase noise generation
- Output clock is phase and frequency locked to the selected input reference clock
- Fixed input to output phase relationship (except for 1.544 MHz and 2.048 MHz output selections)
- +115ppm minimum crystal frequency pullability range, using recommended crystal
- Industrial temperature range
- Low power CMOS technology
- 20 pin SOIC package
- Single 3.3V power supply
- Pb (lead) free package
説明
The MK2059-01 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that produces common telecommunications reference frequencies. The output clock is phase locked to an 8kHz (frame rate) input reference clock. The MK2059-01 also provides jitter attenuation. Included in the selection of output frequencies are these common system clocks: 1.544 MHz (T1) 2.048 (E1) 19.44 MHz (OC-3) 16.384 MHz (8x E1) This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. Through selection of external loop filter components, the PLL loop bandwidth and damping factor can be tailored to meet input clock jitter attenuation requirements. A loop bandwidth down to the Hz range is possible
