特長
- Generates a T1 (1.544 MHz) or E1 (2.048 MHz) output clock from an 8kHz frame clock input
- Configurable jitter attenuation characteristics, excellent for use as a Stratum source de-jitter circuit
- VCXO-based clock generation ensures very low jitter and phase noise generation
- Output clock is phase and frequency locked to the input reference clock
- +115ppm minimum crystal frequency pullability range, using recommended crystal
- Industrial temperature range
- Low power CMOS technology
- 16 pin TSSOP package
- Single 3.3 V power supply
MK1581-01 - Block Diagram
説明
The MK1581-01 provides synchronization and timing control for T1 and E1 based network access or multitrunk telecommunication systems. The device accepts an 8 kHz frame clock input and uses an on-chip VCXO to produce a synchronized low phase noise clock output. This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. Through selection of external loop filter components values, the device can be tailored to meet the system's clock jitter attenuation requirements. Low-pass jitter attenuation characteristics in the Hz range are possible.
