特長
- Clock data recovery and retiming
- Programmable pre-emphasis on output driver
- Programmable internal 50Ω, 100Ω or high-Z termination
- Stand-alone or I2C software-controlled operation
- 72 lead, 10mm x 10mm QFN package
- Pb-free (RoHS compliant)
ISL54105A Functional Diagram
説明
The ISL54105A is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery (CDR) function for each of the three TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of the ISL54105A are regenerated and perfectly aligned to the regenerated TMDS clock signal, creating an extremely clean, low-jitter DVI/HDMI signal that can be easily decoded by any TMDS receiver. The ISL54105A can be used as a cable extender, to clean up a noisy/jittery TMDS source, or to provide a very stable TMDS signal to a finicky DVI or HDMI receiver.
アプリケーション
- DVI/HDMI extenders
- Televisions/PC monitors/Projectors
