特長
- Quad Integrated 56Gb/s PAM4 Linear TIA with CDR
- Low power – typical 400mW per channel
- Typical 700mVppd output (adjustable)
- Up to 3mApp overload
- Integrated clock and data recovery unit
- Independent, per channel receiver signal strength indicator (RSSI)
- 5kΩ typical differential gain
- Linear operation with internal automatic gain control (AGC)
- Adaptive linear equalizer and decision feedback equalizer (DFE) at the receiver
- Programmable 3-tap de-emphasis at the transmitter
- Support reference-less and reference clock modes
- On-chip testability: eye-opening monitor (EOM), jitter tolerance (JTOL), PRBS generator, error checker
- Support both isolated and common cathode photo-detector (PD) arrays
- I2C interface control
HXR14450 - Block Diagram
説明
The HXR14450 is a quad-channel, low-power, linear transimpedance amplifier (TIA) with an integrated clock and data recovery (CDR) unit. It is a member of the family of optical receiver transmitter array (ORTA) products for high-speed optical interconnects. It is based on PAM4 modulation for next-generation Datacom applications.
The HXR14450 integrates a linear transimpedance pre-amplifier, linear post-amplifier, CDR unit, and a versatile output stage in one chip for higher density and lower power consumption applications.
