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D2-45157

廃止品

Intelligent Digital Amplifier PWM Controller and Audio Processor

特長

  • All digital Class-D amplifier and controller with integrated Digital Signal Processing (DSP)
  • Four integrated Power Stages supporting: 2 Channels, Bridged, 4 Channels, Half-Bridge, 2 Channels, Half-Bridge, plus 1 Channel, Bridged
  • Output power (bridged): 25W (8Ω, <1% THD); 30W (8Ω, <10% THD)
  • Fully programmable Digital Signal Processing (DSP)
  • Includes D2 Audio DSP Sound Enhancement Algorithm and DTS®(SRS) WOW/HD™ Audio Enhancement Algorithms
  • I2S and S/PDIF™ digital audio inputs
  • Asynchronous sample rate converters; sample rates from 32kHz up to 192kHz
  • Wide 9V to 26V Power Stage HV supply range, plus internally-generated gate drive supply
  • Temperature and undervoltage monitoring and individual channel protection
D2-45057_D2-45157 Functional Diagram
D2-45057_D2-45157 Functional Diagram

説明

The D2-4P (D2-45057 and D2-45157) devices are complete System-on-Chip (SoC) Class-D digital audio amplifiers. These devices combine high performance integrated Power Stages, an optimized Audio Processor feature set, and a PWM controller to offer a complete, powerful, and very cost effective audio solution for high volume and cost-critical products. This 4th generation Digital Audio Processor (D2-4P) device combines extensive integrated Digital Signal Processor (DSP) audio processing with amplifier control for a complete audio solution. Its ease of integration into the existing system processor provides complete support for all system product and amplifier functions. The four configurable Power Stages operate as four separate Half-Bridge outputs, as two Full-Bridge outputs, or in combinations of Half-Bridge plus Full-Bridge, which provides flexible loudspeaker drive solutions. Separate PWM outputs provide additional combinations to drive headphone outputs or line level stereo and subwoofer outputs.

アプリケーション

  • PC/Multimedia Speakers
  • Digital TV Audio Systems
  • Portable Device Docking Stations
  • Powered Speaker Systems
Part NumberStatusSamplesStockPackageCarrier TypeMOQ
D2-45157-QRObsoleteN/AOut of StockQFNTube600
D2-45157-QR-TObsoleteN/AIn StockQFNReel3000
読込中

フィルター

    推奨ドキュメント (1)

  1. データシート
    英語
    D2-4P Family Audio SOC Datasheet
    RECOMMENDED
    PDF 1.33 MB d2-45057-157 2010年3月26日

    データシート (1)

  1. データシート
    英語
    D2-4P Family Audio SOC Datasheet
    RECOMMENDED
    PDF 1.33 MB d2-45057-157 2010年3月26日

    アプリケーションノート、ホワイトペーパー (5)

  1. アプリケーションノート
    英語
    R32AN0007: Output Filter Design Selection
    PDF 184 KB r32an0007eu0100-d2-audio-dsp-output-filter-design 2019年5月20日
    AI生成コンテンツ: The document explains the design and selection of output filters for D2 Audio DSP half-bridge and full-bridge configurations. It details the half-bridge output stage, filter network, and bias network that provides a DC offset and AC ground reference. It covers filter operation principles, emphasizing the second-order LC low-pass filter to attenuate high-frequency PWM signals. Loudspeaker impedance impacts filter damping and response. Recommended component values for inductors, capacitors, and bias networks are provided for various load impedances and power ratings.
  2. アプリケーションノート
    英語
    R32AN0006: Writing to EEPROM or SPI Flash Memories using an External Microcontroller Rev.1.00
    PDF 147 KB r32an0006eu-d2-audio-eeprom-spi 2019年5月15日
    AI生成コンテンツ: The document explains procedures for writing firmware and parameter data to EEPROM or SPI Flash memories in D2 Audio DSP systems using an external microcontroller. It details booting methods, control pin configurations, and communication protocols for different D2 Audio device families (D2-1, D2-3, D2-4, D2-6). The process involves loading bootloader or boot code hex files, writing settings to memory, and rebooting to run from the updated non-volatile memory. Specific I2C addresses and pin states are critical for successful operations.
  3. アプリケーションノート
    英語
    R32AN0003: D2-4P Layout Guidelines Rev.1.00
    PDF 445 KB r32an0003eu-d2-4p 2019年5月14日
    AI生成コンテンツ: The document provides detailed layout guidelines for the D2-4P device, emphasizing proper grounding, noise reduction, and heat dissipation techniques. It recommends connecting the IREF resistor directly to the thermal pad ground, minimizing noise by routing signals carefully, and maximizing copper area for thermal performance. Component placement prioritizes decoupling capacitors near the device, followed by bootstrap and filter capacitors. The thermal pad on the PCB serves as both a heat dissipation path and a ground connection, with multiple ground pins tied directly to it. Use of stitching vias and careful via placement enhances thermal and electrical performance.
  4. アプリケーションノート
    英語
    R32AN0002: D2 Audio Customization GUI v3I Sound Processing and Audio Algorithms Rev.1.00
    PDF 297 KB r32an0002eu-d2-audio-dsp 2019年5月13日
    AI生成コンテンツ: The D2 Audio Customization GUI v3 offers a comprehensive set of audio processing blocks including Excursion Control, Delay, Compressor, Expander, Envelope VCA, Reverb, Chime Generator, RMS Level Meter, Fade-Pan, Mono Mixer, Dither Generator, Harmonics Generator, and Compound Blocks. It supports real-time interactive control with graphical displays for magnitude and phase, enabling precise parameter adjustments. The software allows flexible signal flow editing with dynamic register addressing and integration of third-party virtualization algorithms. Each audio block has dedicated registers, and the system generates updated header files for seamless controller integration.
  5. アプリケーションノート
    英語
    R32AN0001: API Register Specification (SRS WOW/HD™ Support) Rev.1.00
    PDF 346 KB r32an0001eu-d2-4-d2-4p 2019年5月10日
    AI生成コンテンツ: The document details the D2-4/D2-4P API register specifications for SRS WOW and HDTM support, focusing on I2C register access and control. It explains the 24-bit hexadecimal addressing, round-off discrepancies in calculations, and default parameter settings stored internally or in EEPROM. The document describes the I2C read/write sequences, device address (0xB2), and register address mapping for audio processing controls, including volume, mixers, equalizers, filters, compressors, and SRS WOW/HD processing. Audio processing flow is defined by internal firmware and DSP, with programmable parameters for various audio blocks.

    製品通知（PCN、EOLなど） (1)

  1. EOL通知
    英語
    PLC21060 - End of Life Notice
    PDF 603 KB 2022年1月21日
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