特長
- 12-bit resolution
- -3 dB bandwidth of 245 MHz
- 5 V power supplies and 3.3 V output power supply
- Binary or twos complement CMOS outputs
- Differential AC or Positive Emitter-Coupled Logic (PECL) clock input
- TTL
- compatible
- Differential analog input
- External amplitude range control
- In-range CMOS compatible output
- Integrated sample and hold amplifier
- Low analog input capacitance (typical 2 pF), no buffer amplifier required
- Power dissipation 550 mW (typical)
- Sampling rate up to 70 MHz
- TTL and CMOS compatible digital outputs
- TTL and CMOS compatible static digital inputs
- Voltage controlled regulator included
ADC1206S070H - Block Diagram
説明
The ADC1206S040/055/070 are a family of BiCMOS 12-bit Analog-to-Digital Converters (ADC) optimized for a wide range of applications such as cellular infrastructures, professional telecommunications, imaging, and digital radio. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 70 MHz. All static digital inputs (SH, CE and OTC) are Transistor-Transistor Logic (TTL) and CMOS compatible and all outputs are CMOS compatible. A sine wave clock input signal can also be used.
