パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PYG28 |
| Lead Count (#): | 28 |
| Pkg. Dimensions (mm): | 10.2 x 5.3 x 1.73 |
| Pitch (mm): | 0.65 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 28 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 1500 |
| Qty. per Carrier (#) | 0 |
| Package Area (mm²) | 54.1 |
| Pkg. Dimensions (mm) | 10.2 x 5.3 x 1.73 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Accepts Spread Spec Input | Yes |
| Advanced Features | Accepts Spread Spec Input, Reference Output |
| App Jitter Compliance | DDR, DDR2 |
| C-C Jitter Max P-P (ps) | 50 |
| Core Voltage (V) | 1.8V, 2.5V |
| Delay Mode | Variable |
| Die Form | No |
| Diff. Input Signaling | SSTL-2 |
| Diff. Output Signaling | SSTL-2 |
| Input Freq (MHz) | 125 |
| Input Type | LVCMOS |
| Inputs (#) | 4 |
| Length (mm) | 10.2 |
| MOQ | 1500 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 125 |
| Output Skew (ps) | 40 |
| Output Type | SSTL-2 |
| Output Voltage (V) | 2.5V, 1.8V |
| Outputs (#) | 6 |
| Period Jitter Max P-P (ps) | 30 |
| Pitch (mm) | 0.65 |
| Pkg. Type | SSOP |
| Product Category | Zero Delay Buffers |
| Reel Size (in) | 13 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Tape & Reel | Yes |
| Thickness (mm) | 1.73 |
| Width (mm) | 5.3 |
9P935 に関するリソース
説明
DDR I/DDR II Phase Lock Loop Zero Delay Buffer